Home
last modified time | relevance | path

Searched refs:SDMA1_PUB_REG_TYPE0__SDMA1_CLK_CTRL__SHIFT (Results 1 – 18 of 18) sorted by relevance

/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h182 #define SDMA1_PUB_REG_TYPE0__SDMA1_CLK_CTRL__SHIFT 0x1b macro
H A Dsdma1_4_2_2_sh_mask.h182 #define SDMA1_PUB_REG_TYPE0__SDMA1_CLK_CTRL__SHIFT macro
H A Dsdma1_4_2_sh_mask.h183 #define SDMA1_PUB_REG_TYPE0__SDMA1_CLK_CTRL__SHIFT macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h182 #define SDMA1_PUB_REG_TYPE0__SDMA1_CLK_CTRL__SHIFT 0x1b macro
H A Dsdma1_4_2_sh_mask.h183 #define SDMA1_PUB_REG_TYPE0__SDMA1_CLK_CTRL__SHIFT macro
H A Dsdma1_4_2_2_sh_mask.h182 #define SDMA1_PUB_REG_TYPE0__SDMA1_CLK_CTRL__SHIFT macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h182 #define SDMA1_PUB_REG_TYPE0__SDMA1_CLK_CTRL__SHIFT 0x1b macro
H A Dsdma1_4_2_sh_mask.h183 #define SDMA1_PUB_REG_TYPE0__SDMA1_CLK_CTRL__SHIFT macro
H A Dsdma1_4_2_2_sh_mask.h182 #define SDMA1_PUB_REG_TYPE0__SDMA1_CLK_CTRL__SHIFT macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_3_0_1_sh_mask.h2560 #define SDMA1_PUB_REG_TYPE0__SDMA1_CLK_CTRL__SHIFT 0x3 macro
H A Doss_3_0_sh_mask.h2686 #define SDMA1_PUB_REG_TYPE0__SDMA1_CLK_CTRL__SHIFT 0x3 macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_3_0_1_sh_mask.h2560 #define SDMA1_PUB_REG_TYPE0__SDMA1_CLK_CTRL__SHIFT 0x3 macro
H A Doss_3_0_sh_mask.h2686 #define SDMA1_PUB_REG_TYPE0__SDMA1_CLK_CTRL__SHIFT 0x3 macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_3_0_1_sh_mask.h2560 #define SDMA1_PUB_REG_TYPE0__SDMA1_CLK_CTRL__SHIFT 0x3 macro
H A Doss_3_0_sh_mask.h2686 #define SDMA1_PUB_REG_TYPE0__SDMA1_CLK_CTRL__SHIFT 0x3 macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_3_0_sh_mask.h35828 #define SDMA1_PUB_REG_TYPE0__SDMA1_CLK_CTRL__SHIFT macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_3_0_sh_mask.h35828 #define SDMA1_PUB_REG_TYPE0__SDMA1_CLK_CTRL__SHIFT macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_3_0_sh_mask.h35828 #define SDMA1_PUB_REG_TYPE0__SDMA1_CLK_CTRL__SHIFT macro