| /dports/sysutils/uefi-edk2-bhyve-csm/uefi-edk2-aa8d718/Omap35xxPkg/Include/Omap3530/ |
| H A D | Omap3530PadConfiguration.h | 33 #define SDRC_D12 (SYSTEM_CONTROL_MODULE_BASE + 0x048) macro
|
| /dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/TexasInstruments/Omap35xxPkg/Include/Omap3530/ |
| H A D | Omap3530PadConfiguration.h | 27 #define SDRC_D12 (SYSTEM_CONTROL_MODULE_BASE + 0x048)
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/board/logicpd/zoom1/ |
| H A D | zoom1.h | 50 MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/logicpd/zoom1/ |
| H A D | zoom1.h | 50 MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/board/logicpd/zoom1/ |
| H A D | zoom1.h | 50 MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/board/logicpd/zoom1/ |
| H A D | zoom1.h | 50 MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\
|
| /dports/sysutils/u-boot-utilite/u-boot-2015.07/board/logicpd/zoom1/ |
| H A D | zoom1.h | 51 MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\
|
| /dports/sysutils/u-boot-tools/u-boot-2020.07/board/logicpd/zoom1/ |
| H A D | zoom1.h | 50 MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/board/logicpd/zoom1/ |
| H A D | zoom1.h | 50 MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/board/isee/igep00x0/ |
| H A D | igep00x0.h | 32 MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /* SDRC_D12 */\
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/isee/igep00x0/ |
| H A D | igep00x0.h | 32 MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /* SDRC_D12 */\
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/board/isee/igep00x0/ |
| H A D | igep00x0.h | 32 MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /* SDRC_D12 */\
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/board/isee/igep00x0/ |
| H A D | igep00x0.h | 32 MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /* SDRC_D12 */\
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/board/isee/igep00x0/ |
| H A D | igep00x0.h | 32 MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /* SDRC_D12 */\
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/board/isee/igep00x0/ |
| H A D | igep00x0.h | 32 MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /* SDRC_D12 */\
|
| /dports/sysutils/u-boot-wandboard/u-boot-2021.07/board/isee/igep00x0/ |
| H A D | igep00x0.h | 32 MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /* SDRC_D12 */\
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/board/isee/igep00x0/ |
| H A D | igep00x0.h | 32 MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /* SDRC_D12 */\
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/board/isee/igep00x0/ |
| H A D | igep00x0.h | 32 MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /* SDRC_D12 */\
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/board/isee/igep00x0/ |
| H A D | igep00x0.h | 32 MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /* SDRC_D12 */\
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/board/isee/igep00x0/ |
| H A D | igep00x0.h | 32 MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /* SDRC_D12 */\
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/board/isee/igep00x0/ |
| H A D | igep00x0.h | 32 MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /* SDRC_D12 */\
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/board/isee/igep00x0/ |
| H A D | igep00x0.h | 32 MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /* SDRC_D12 */\
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/board/isee/igep00x0/ |
| H A D | igep00x0.h | 32 MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /* SDRC_D12 */\
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/board/isee/igep00x0/ |
| H A D | igep00x0.h | 32 MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /* SDRC_D12 */\
|
| /dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/board/isee/igep00x0/ |
| H A D | igep00x0.h | 32 MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /* SDRC_D12 */\
|