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Searched refs:SETAr (Results 1 – 25 of 105) sorted by relevance

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/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/X86/GlobalISel/
H A Dx86_64-select-fcmp.mir212 ; CHECK: [[SETAr:%[0-9]+]]:gr8 = SETAr implicit $eflags
213 ; CHECK: $al = COPY [[SETAr]]
288 ; CHECK: [[SETAr:%[0-9]+]]:gr8 = SETAr implicit $eflags
289 ; CHECK: $al = COPY [[SETAr]]
748 ; CHECK: [[SETAr:%[0-9]+]]:gr8 = SETAr implicit $eflags
749 ; CHECK: $al = COPY [[SETAr]]
824 ; CHECK: [[SETAr:%[0-9]+]]:gr8 = SETAr implicit $eflags
825 ; CHECK: $al = COPY [[SETAr]]
H A Dselect-cmp.mir257 ; CHECK: [[SETAr:%[0-9]+]]:gr8 = SETAr implicit $eflags
258 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETAr]], %subreg.sub_8bit
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/X86/
H A Dflags-copy-lowering.mir122 ; CHECK: %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
178 ; CHECK: %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
233 ; CHECK: %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
244 %3:gr8 = SETAr implicit $eflags
276 ; CHECK: %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
604 ; CHECK-NEXT: %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
678 ; CHECK-NEXT: %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
827 ; CHECK: %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
965 %2:gr8 = SETAr implicit $eflags
969 ; CHECK-NEXT: %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/X86/
H A Dflags-copy-lowering.mir122 ; CHECK: %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
178 ; CHECK: %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
233 ; CHECK: %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
244 %3:gr8 = SETAr implicit $eflags
276 ; CHECK: %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
604 ; CHECK-NEXT: %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
678 ; CHECK-NEXT: %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
827 ; CHECK: %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
965 %2:gr8 = SETAr implicit $eflags
969 ; CHECK-NEXT: %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/X86/
H A DX86FixupSetCC.cpp82 case X86::SETAr: in isSetCCr()
/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/X86/
H A DX86FixupSetCC.cpp82 case X86::SETAr:
H A DX86ISelDAGToDAG.cpp2103 case X86::SETAr: case X86::SETAEr: case X86::SETBr: case X86::SETBEr:
/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/X86/GlobalISel/
H A Dselect-cmp.mir257 ; CHECK: [[SETAr:%[0-9]+]]:gr8 = SETAr implicit $eflags
258 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETAr]], %subreg.sub_8bit
/dports/lang/smalltalk/smalltalk-3.2.5/lightning/i386/
H A Dcore-i386.h293 #define jit_gtr_ui(d, s1, s2) jit_bool_r((d), (s1), (s2), SETAr )
304 #define jit_gti_ui(d, rs, is) jit_bool_i0((d), (rs), (is), SETAr, SETNEr )
H A Dasm-i386.h798 #define SETAr(RD) SETCCir(0x7,RD) macro
/dports/security/clamav-lts/clamav-0.103.5/libclamav/c++/llvm/lib/Target/X86/
H A DX86FastISel.cpp899 case CmpInst::FCMP_OGT: SwapArgs = false; SetCCOpc = X86::SETAr; break; in X86SelectCmp()
901 case CmpInst::FCMP_OLT: SwapArgs = true; SetCCOpc = X86::SETAr; break; in X86SelectCmp()
914 case CmpInst::ICMP_UGT: SwapArgs = false; SetCCOpc = X86::SETAr; break; in X86SelectCmp()
H A DX86ISelDAGToDAG.cpp1517 case X86::SETAr: case X86::SETAEr: case X86::SETBr: case X86::SETBEr: in HasNoSignedComparisonUses()
/dports/lang/racket-minimal/racket-8.3/src/bc/src/lightning/i386/
H A Dcore.h530 #define jit_gtr_ui(d, s1, s2) jit_bool_r((d), (s1), (s2), SETAr )
541 #define jit_gti_ui(d, rs, is) jit_bool_i0((d), (rs), (is), SETAr, SETNEr )
/dports/lang/racket/racket-8.3/src/bc/src/lightning/i386/
H A Dcore.h530 #define jit_gtr_ui(d, s1, s2) jit_bool_r((d), (s1), (s2), SETAr )
541 #define jit_gti_ui(d, rs, is) jit_bool_i0((d), (rs), (is), SETAr, SETNEr )
/dports/security/clamav-lts/clamav-0.103.5/libclamav/c++/
H A DX86GenInstrNames.inc2232 SETAr = 2219,
/dports/devel/capstone4/capstone-4.0.2/arch/X86/
H A DX86GenAsmWriter1_reduce.inc1362 4168U, // SETAr
3080 0U, // SETAr
/dports/devel/py-capstone/capstone-4.0.1/src/arch/X86/
H A DX86GenAsmWriter1_reduce.inc1362 4168U, // SETAr
3080 0U, // SETAr
/dports/devel/redasm/REDasm-2.1.1/LibREDasm/depends/capstone/arch/X86/
H A DX86GenAsmWriter1_reduce.inc1362 4168U, // SETAr
3080 0U, // SETAr
/dports/emulators/qemu/qemu-6.2.0/capstone/arch/X86/
H A DX86GenAsmWriter1_reduce.inc1754 4168U, // SETAr
/dports/emulators/qemu60/qemu-6.0.0/capstone/arch/X86/
H A DX86GenAsmWriter1_reduce.inc1754 4168U, // SETAr
/dports/emulators/gngeo/gngeo-gngeo_0.8/src/generator68k/ccg/
H A Dasm-i386.h876 #define SETAr(RD) SETCCir(0x7,RD) macro
/dports/emulators/qemu5/qemu-5.2.0/capstone/arch/X86/
H A DX86GenAsmWriter1_reduce.inc1754 4168U, // SETAr
/dports/devel/xelfviewer/XELFViewer-0.03/XCapstone/3rdparty/Capstone/src/arch/X86/
H A DX86GenAsmWriter1_reduce.inc1754 4168U, // SETAr
/dports/devel/capstone3/capstone-3.0.5/arch/X86/
H A DX86GenAsmWriter1_reduce.inc1329 4137U, // SETAr
/dports/emulators/qemu42/qemu-4.2.1/capstone/arch/X86/
H A DX86GenAsmWriter1_reduce.inc1329 4137U, // SETAr

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