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Searched refs:SETCC (Results 1 – 25 of 1203) sorted by relevance

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/dports/devel/vasm/vasm/cpus/arm/
H A Dopcodes.h1 "add", {REG15,REG19,IMROT}, {0x02800000,AAANY,SETCC},
2 "add", {REG15,REG19,IMMD8,IROTV}, {0x02800000,AAANY,SETCC},
3 "add", {REG15,REG19,REG03}, {0x00800000,AAANY,SETCC},
4 "add", {REG15,REG19,REG03,SHIFT}, {0x00800000,AAANY,SETCC},
14 "adc", {REG15,REG19,IMROT}, {0x02a00000,AAANY,SETCC},
15 "adc", {REG15,REG19,IMMD8,IROTV}, {0x02a00000,AAANY,SETCC},
16 "adc", {REG15,REG19,REG03}, {0x00a00000,AAANY,SETCC},
17 "adc", {REG15,REG19,REG03,SHIFT}, {0x00a00000,AAANY,SETCC},
21 "and", {REG15,REG19,IMROT}, {0x02000000,AAANY,SETCC},
22 "and", {REG15,REG19,IMMD8,IROTV}, {0x02000000,AAANY,SETCC},
[all …]
/dports/devel/dev86/dev86-0.16.20/as/
H A Dkeywords.c625 4, 'S', 'E', 'T', 'A', SETCC, 0x97,
626 5, 'S', 'E', 'T', 'A', 'E', SETCC, 0x93,
627 4, 'S', 'E', 'T', 'B', SETCC, 0x92,
629 4, 'S', 'E', 'T', 'C', SETCC, 0x92,
630 4, 'S', 'E', 'T', 'E', SETCC, 0x94,
631 4, 'S', 'E', 'T', 'G', SETCC, 0x9F,
633 4, 'S', 'E', 'T', 'L', SETCC, 0x9C,
649 4, 'S', 'E', 'T', 'O', SETCC, 0x90,
650 4, 'S', 'E', 'T', 'P', SETCC, 0x9A,
653 4, 'S', 'E', 'T', 'S', SETCC, 0x98,
[all …]
/dports/emulators/qemu/qemu-6.2.0/capstone/suite/synctools/tablegen/X86/
H A DX86InstrCMovSetCC.td81 multiclass SETCC<bits<8> opc, string Mnemonic, PatLeaf OpNode> {
94 defm SETO : SETCC<0x90, "seto", X86_COND_O>; // is overflow bit set
96 defm SETB : SETCC<0x92, "setb", X86_COND_B>; // unsigned less than
98 defm SETE : SETCC<0x94, "sete", X86_COND_E>; // equal to
99 defm SETNE : SETCC<0x95, "setne", X86_COND_NE>; // not equal to
101 defm SETA : SETCC<0x97, "seta", X86_COND_A>; // unsigned greater than
102 defm SETS : SETCC<0x98, "sets", X86_COND_S>; // is signed bit set
103 defm SETNS : SETCC<0x99, "setns", X86_COND_NS>; // is not signed
104 defm SETP : SETCC<0x9A, "setp", X86_COND_P>; // is parity bit set
106 defm SETL : SETCC<0x9C, "setl", X86_COND_L>; // signed less than
[all …]
/dports/emulators/qemu/qemu-6.2.0/capstone/suite/synctools/tablegen/X86/back/
H A DX86InstrCMovSetCC.td81 multiclass SETCC<bits<8> opc, string Mnemonic, PatLeaf OpNode> {
94 defm SETO : SETCC<0x90, "seto", X86_COND_O>; // is overflow bit set
96 defm SETB : SETCC<0x92, "setb", X86_COND_B>; // unsigned less than
98 defm SETE : SETCC<0x94, "sete", X86_COND_E>; // equal to
99 defm SETNE : SETCC<0x95, "setne", X86_COND_NE>; // not equal to
101 defm SETA : SETCC<0x97, "seta", X86_COND_A>; // unsigned greater than
102 defm SETS : SETCC<0x98, "sets", X86_COND_S>; // is signed bit set
103 defm SETNS : SETCC<0x99, "setns", X86_COND_NS>; // is not signed
104 defm SETP : SETCC<0x9A, "setp", X86_COND_P>; // is parity bit set
106 defm SETL : SETCC<0x9C, "setl", X86_COND_L>; // signed less than
[all …]
/dports/emulators/qemu5/qemu-5.2.0/capstone/suite/synctools/tablegen/X86/back/
H A DX86InstrCMovSetCC.td81 multiclass SETCC<bits<8> opc, string Mnemonic, PatLeaf OpNode> {
94 defm SETO : SETCC<0x90, "seto", X86_COND_O>; // is overflow bit set
96 defm SETB : SETCC<0x92, "setb", X86_COND_B>; // unsigned less than
98 defm SETE : SETCC<0x94, "sete", X86_COND_E>; // equal to
99 defm SETNE : SETCC<0x95, "setne", X86_COND_NE>; // not equal to
101 defm SETA : SETCC<0x97, "seta", X86_COND_A>; // unsigned greater than
102 defm SETS : SETCC<0x98, "sets", X86_COND_S>; // is signed bit set
103 defm SETNS : SETCC<0x99, "setns", X86_COND_NS>; // is not signed
104 defm SETP : SETCC<0x9A, "setp", X86_COND_P>; // is parity bit set
106 defm SETL : SETCC<0x9C, "setl", X86_COND_L>; // signed less than
[all …]
/dports/emulators/qemu60/qemu-6.0.0/capstone/suite/synctools/tablegen/X86/
H A DX86InstrCMovSetCC.td81 multiclass SETCC<bits<8> opc, string Mnemonic, PatLeaf OpNode> {
94 defm SETO : SETCC<0x90, "seto", X86_COND_O>; // is overflow bit set
96 defm SETB : SETCC<0x92, "setb", X86_COND_B>; // unsigned less than
98 defm SETE : SETCC<0x94, "sete", X86_COND_E>; // equal to
99 defm SETNE : SETCC<0x95, "setne", X86_COND_NE>; // not equal to
101 defm SETA : SETCC<0x97, "seta", X86_COND_A>; // unsigned greater than
102 defm SETS : SETCC<0x98, "sets", X86_COND_S>; // is signed bit set
103 defm SETNS : SETCC<0x99, "setns", X86_COND_NS>; // is not signed
104 defm SETP : SETCC<0x9A, "setp", X86_COND_P>; // is parity bit set
106 defm SETL : SETCC<0x9C, "setl", X86_COND_L>; // signed less than
[all …]
/dports/emulators/qemu60/qemu-6.0.0/capstone/suite/synctools/tablegen/X86/back/
H A DX86InstrCMovSetCC.td81 multiclass SETCC<bits<8> opc, string Mnemonic, PatLeaf OpNode> {
94 defm SETO : SETCC<0x90, "seto", X86_COND_O>; // is overflow bit set
96 defm SETB : SETCC<0x92, "setb", X86_COND_B>; // unsigned less than
98 defm SETE : SETCC<0x94, "sete", X86_COND_E>; // equal to
99 defm SETNE : SETCC<0x95, "setne", X86_COND_NE>; // not equal to
101 defm SETA : SETCC<0x97, "seta", X86_COND_A>; // unsigned greater than
102 defm SETS : SETCC<0x98, "sets", X86_COND_S>; // is signed bit set
103 defm SETNS : SETCC<0x99, "setns", X86_COND_NS>; // is not signed
104 defm SETP : SETCC<0x9A, "setp", X86_COND_P>; // is parity bit set
106 defm SETL : SETCC<0x9C, "setl", X86_COND_L>; // signed less than
[all …]
/dports/emulators/qemu5/qemu-5.2.0/capstone/suite/synctools/tablegen/X86/
H A DX86InstrCMovSetCC.td81 multiclass SETCC<bits<8> opc, string Mnemonic, PatLeaf OpNode> {
94 defm SETO : SETCC<0x90, "seto", X86_COND_O>; // is overflow bit set
96 defm SETB : SETCC<0x92, "setb", X86_COND_B>; // unsigned less than
98 defm SETE : SETCC<0x94, "sete", X86_COND_E>; // equal to
99 defm SETNE : SETCC<0x95, "setne", X86_COND_NE>; // not equal to
101 defm SETA : SETCC<0x97, "seta", X86_COND_A>; // unsigned greater than
102 defm SETS : SETCC<0x98, "sets", X86_COND_S>; // is signed bit set
103 defm SETNS : SETCC<0x99, "setns", X86_COND_NS>; // is not signed
104 defm SETP : SETCC<0x9A, "setp", X86_COND_P>; // is parity bit set
106 defm SETL : SETCC<0x9C, "setl", X86_COND_L>; // signed less than
[all …]
/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/X86/
H A DX86InstrCMovSetCC.td81 multiclass SETCC<bits<8> opc, string Mnemonic, PatLeaf OpNode> {
94 defm SETO : SETCC<0x90, "seto", X86_COND_O>; // is overflow bit set
96 defm SETB : SETCC<0x92, "setb", X86_COND_B>; // unsigned less than
98 defm SETE : SETCC<0x94, "sete", X86_COND_E>; // equal to
99 defm SETNE : SETCC<0x95, "setne", X86_COND_NE>; // not equal to
101 defm SETA : SETCC<0x97, "seta", X86_COND_A>; // unsigned greater than
102 defm SETS : SETCC<0x98, "sets", X86_COND_S>; // is signed bit set
103 defm SETNS : SETCC<0x99, "setns", X86_COND_NS>; // is not signed
104 defm SETP : SETCC<0x9A, "setp", X86_COND_P>; // is parity bit set
106 defm SETL : SETCC<0x9C, "setl", X86_COND_L>; // signed less than
[all …]
/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/X86/
H A DX86InstrCMovSetCC.td81 multiclass SETCC<bits<8> opc, string Mnemonic, PatLeaf OpNode> {
94 defm SETO : SETCC<0x90, "seto", X86_COND_O>; // is overflow bit set
96 defm SETB : SETCC<0x92, "setb", X86_COND_B>; // unsigned less than
98 defm SETE : SETCC<0x94, "sete", X86_COND_E>; // equal to
99 defm SETNE : SETCC<0x95, "setne", X86_COND_NE>; // not equal to
101 defm SETA : SETCC<0x97, "seta", X86_COND_A>; // unsigned greater than
102 defm SETS : SETCC<0x98, "sets", X86_COND_S>; // is signed bit set
103 defm SETNS : SETCC<0x99, "setns", X86_COND_NS>; // is not signed
104 defm SETP : SETCC<0x9A, "setp", X86_COND_P>; // is parity bit set
106 defm SETL : SETCC<0x9C, "setl", X86_COND_L>; // signed less than
[all …]
/dports/games/libretro-prboom/libretro-prboom-cc80175/deps/fluidlite/src/
H A Dfluid_chan.c26 #define SETCC(_c,_n,_v) _c->cc[_n] = _v macro
85 SETCC(chan, i, 0); in fluid_channel_init_ctrl()
89 SETCC(chan, VOLUME_MSB, 127); in fluid_channel_init_ctrl()
90 SETCC(chan, VOLUME_LSB, 0); in fluid_channel_init_ctrl()
93 SETCC(chan, PAN_MSB, 64); in fluid_channel_init_ctrl()
94 SETCC(chan, PAN_LSB, 0); in fluid_channel_init_ctrl()
97 SETCC(chan, EXPRESSION_MSB, 127); in fluid_channel_init_ctrl()
98 SETCC(chan, EXPRESSION_LSB, 127); in fluid_channel_init_ctrl()
101 SETCC(chan, RPN_LSB, 127); in fluid_channel_init_ctrl()
102 SETCC(chan, RPN_MSB, 127); in fluid_channel_init_ctrl()
/dports/games/libretro-scummvm/scummvm-7b1e929/backends/platform/libretro/deps/fluidsynth/src/
H A Dfluid_chan.c26 #define SETCC(_c,_n,_v) _c->cc[_n] = _v macro
85 SETCC(chan, i, 0); in fluid_channel_init_ctrl()
89 SETCC(chan, VOLUME_MSB, 127); in fluid_channel_init_ctrl()
90 SETCC(chan, VOLUME_LSB, 0); in fluid_channel_init_ctrl()
93 SETCC(chan, PAN_MSB, 64); in fluid_channel_init_ctrl()
94 SETCC(chan, PAN_LSB, 0); in fluid_channel_init_ctrl()
97 SETCC(chan, EXPRESSION_MSB, 127); in fluid_channel_init_ctrl()
98 SETCC(chan, EXPRESSION_LSB, 127); in fluid_channel_init_ctrl()
101 SETCC(chan, RPN_LSB, 127); in fluid_channel_init_ctrl()
102 SETCC(chan, RPN_MSB, 127); in fluid_channel_init_ctrl()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AArch64/
H A Daarch64-neon-v1i1-setcc.ll4 ; This file test the DAG node like "v1i1 SETCC v1i64, v1i64". As the v1i1 type
6 ; As the v1i64 operands of SETCC are legal types, they will not be scalarized.
8 ; operands of SETCC have been legalized.
10 ; "v1i1 SETCC" correctly, these test cases are not needed.
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AArch64/
H A Daarch64-neon-v1i1-setcc.ll4 ; This file test the DAG node like "v1i1 SETCC v1i64, v1i64". As the v1i1 type
6 ; As the v1i64 operands of SETCC are legal types, they will not be scalarized.
8 ; operands of SETCC have been legalized.
10 ; "v1i1 SETCC" correctly, these test cases are not needed.
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AArch64/
H A Daarch64-neon-v1i1-setcc.ll4 ; This file test the DAG node like "v1i1 SETCC v1i64, v1i64". As the v1i1 type
6 ; As the v1i64 operands of SETCC are legal types, they will not be scalarized.
8 ; operands of SETCC have been legalized.
10 ; "v1i1 SETCC" correctly, these test cases are not needed.
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Daarch64-neon-v1i1-setcc.ll4 ; This file test the DAG node like "v1i1 SETCC v1i64, v1i64". As the v1i1 type
6 ; As the v1i64 operands of SETCC are legal types, they will not be scalarized.
8 ; operands of SETCC have been legalized.
10 ; "v1i1 SETCC" correctly, these test cases are not needed.
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AArch64/
H A Daarch64-neon-v1i1-setcc.ll4 ; This file test the DAG node like "v1i1 SETCC v1i64, v1i64". As the v1i1 type
6 ; As the v1i64 operands of SETCC are legal types, they will not be scalarized.
8 ; operands of SETCC have been legalized.
10 ; "v1i1 SETCC" correctly, these test cases are not needed.
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AArch64/
H A Daarch64-neon-v1i1-setcc.ll4 ; This file test the DAG node like "v1i1 SETCC v1i64, v1i64". As the v1i1 type
6 ; As the v1i64 operands of SETCC are legal types, they will not be scalarized.
8 ; operands of SETCC have been legalized.
10 ; "v1i1 SETCC" correctly, these test cases are not needed.
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AArch64/
H A Daarch64-neon-v1i1-setcc.ll4 ; This file test the DAG node like "v1i1 SETCC v1i64, v1i64". As the v1i1 type
6 ; As the v1i64 operands of SETCC are legal types, they will not be scalarized.
8 ; operands of SETCC have been legalized.
10 ; "v1i1 SETCC" correctly, these test cases are not needed.
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Daarch64-neon-v1i1-setcc.ll4 ; This file test the DAG node like "v1i1 SETCC v1i64, v1i64". As the v1i1 type
6 ; As the v1i64 operands of SETCC are legal types, they will not be scalarized.
8 ; operands of SETCC have been legalized.
10 ; "v1i1 SETCC" correctly, these test cases are not needed.
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AArch64/
H A Daarch64-neon-v1i1-setcc.ll4 ; This file test the DAG node like "v1i1 SETCC v1i64, v1i64". As the v1i1 type
6 ; As the v1i64 operands of SETCC are legal types, they will not be scalarized.
8 ; operands of SETCC have been legalized.
10 ; "v1i1 SETCC" correctly, these test cases are not needed.
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AArch64/
H A Daarch64-neon-v1i1-setcc.ll4 ; This file test the DAG node like "v1i1 SETCC v1i64, v1i64". As the v1i1 type
6 ; As the v1i64 operands of SETCC are legal types, they will not be scalarized.
8 ; operands of SETCC have been legalized.
10 ; "v1i1 SETCC" correctly, these test cases are not needed.
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Daarch64-neon-v1i1-setcc.ll4 ; This file test the DAG node like "v1i1 SETCC v1i64, v1i64". As the v1i1 type
6 ; As the v1i64 operands of SETCC are legal types, they will not be scalarized.
8 ; operands of SETCC have been legalized.
10 ; "v1i1 SETCC" correctly, these test cases are not needed.
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AArch64/
H A Daarch64-neon-v1i1-setcc.ll4 ; This file test the DAG node like "v1i1 SETCC v1i64, v1i64". As the v1i1 type
6 ; As the v1i64 operands of SETCC are legal types, they will not be scalarized.
8 ; operands of SETCC have been legalized.
10 ; "v1i1 SETCC" correctly, these test cases are not needed.
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AArch64/
H A Daarch64-neon-v1i1-setcc.ll4 ; This file test the DAG node like "v1i1 SETCC v1i64, v1i64". As the v1i1 type
6 ; As the v1i64 operands of SETCC are legal types, they will not be scalarized.
8 ; operands of SETCC have been legalized.
10 ; "v1i1 SETCC" correctly, these test cases are not needed.

12345678910>>...49