| /dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/sh/ |
| H A D | interp.c | 310 #define SET_FPSCR(x) \ macro
1989 SET_FPSCR (val);
|
| H A D | ChangeLog | 534 (SET_FPSCR, GET_FPSCR): Use macros to update fpscr register.
|
| /dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/sh/ |
| H A D | interp.c | 310 #define SET_FPSCR(x) \ macro
1989 SET_FPSCR (val);
|
| H A D | ChangeLog | 534 (SET_FPSCR, GET_FPSCR): Use macros to update fpscr register.
|
| /dports/devel/avr-gdb/gdb-7.3.1/sim/sh/ |
| H A D | interp.c | 366 #define SET_FPSCR(x) \ macro
2231 SET_FPSCR (val);
|
| H A D | ChangeLog | 692 (SET_FPSCR, GET_FPSCR): Use macros to update fpscr register.
|
| /dports/devel/gdb761/gdb-7.6.1/sim/sh/ |
| H A D | interp.c | 366 #define SET_FPSCR(x) \ macro
2231 SET_FPSCR (val);
|
| H A D | ChangeLog | 726 (SET_FPSCR, GET_FPSCR): Use macros to update fpscr register.
|
| /dports/devel/avr-gcc/gcc-10.2.0/gcc/config/arm/ |
| H A D | vfp.md | 309 return \"mcr\\tp10, 7, %1, cr1, cr0, 0\\t @SET_FPSCR\";
2102 "mcr\\tp10, 7, %0, cr1, cr0, 0\\t @SET_FPSCR"
|
| /dports/lang/gcc11-devel/gcc-11-20211009/gcc/config/arm/ |
| H A D | vfp.md | 309 return \"mcr\\tp10, 7, %1, cr1, cr0, 0\\t @SET_FPSCR\";
2107 "mcr\\tp10, 7, %0, cr1, cr0, 0\\t @SET_FPSCR"
|
| /dports/lang/gcc10-devel/gcc-10-20211008/gcc/config/arm/ |
| H A D | vfp.md | 309 return \"mcr\\tp10, 7, %1, cr1, cr0, 0\\t @SET_FPSCR\";
2107 "mcr\\tp10, 7, %0, cr1, cr0, 0\\t @SET_FPSCR"
|
| /dports/lang/gcc12-devel/gcc-12-20211205/gcc/config/arm/ |
| H A D | vfp.md | 309 return \"mcr\\tp10, 7, %1, cr1, cr0, 0\\t @SET_FPSCR\";
2107 "mcr\\tp10, 7, %0, cr1, cr0, 0\\t @SET_FPSCR"
|
| /dports/misc/cxx_atomics_pic/gcc-11.2.0/gcc/config/arm/ |
| H A D | vfp.md | 309 return \"mcr\\tp10, 7, %1, cr1, cr0, 0\\t @SET_FPSCR\";
2102 "mcr\\tp10, 7, %0, cr1, cr0, 0\\t @SET_FPSCR"
|
| /dports/lang/gcc10/gcc-10.3.0/gcc/config/arm/ |
| H A D | vfp.md | 309 return \"mcr\\tp10, 7, %1, cr1, cr0, 0\\t @SET_FPSCR\";
2102 "mcr\\tp10, 7, %0, cr1, cr0, 0\\t @SET_FPSCR"
|
| /dports/lang/gcc11/gcc-11.2.0/gcc/config/arm/ |
| H A D | vfp.md | 309 return \"mcr\\tp10, 7, %1, cr1, cr0, 0\\t @SET_FPSCR\";
2102 "mcr\\tp10, 7, %0, cr1, cr0, 0\\t @SET_FPSCR"
|
| /dports/lang/gnat_util/gcc-6-20180516/gcc/config/arm/ |
| H A D | vfp.md | 1386 "mcr\\tp10, 7, %0, cr1, cr0, 0\\t @SET_FPSCR"
|
| H A D | arm-builtins.c | 1251 FP_BUILTIN (set_fpscr, SET_FPSCR)
|
| /dports/lang/gcc6-aux/gcc-6-20180516/gcc/config/arm/ |
| H A D | vfp.md | 1386 "mcr\\tp10, 7, %0, cr1, cr0, 0\\t @SET_FPSCR"
|
| H A D | arm-builtins.c | 1251 FP_BUILTIN (set_fpscr, SET_FPSCR)
|
| /dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/config/arm/ |
| H A D | arm-builtins.c | 1436 FP_BUILTIN (set_fpscr, SET_FPSCR)
|
| /dports/lang/gcc9/gcc-9.4.0/gcc/config/arm/ |
| H A D | arm-builtins.c | 1451 FP_BUILTIN (set_fpscr, SET_FPSCR)
|
| /dports/devel/riscv64-gcc/gcc-8.3.0/gcc/config/arm/ |
| H A D | arm-builtins.c | 1436 FP_BUILTIN (set_fpscr, SET_FPSCR)
|
| /dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/config/arm/ |
| H A D | arm-builtins.c | 1436 FP_BUILTIN (set_fpscr, SET_FPSCR)
|
| /dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/config/arm/ |
| H A D | arm-builtins.c | 1436 FP_BUILTIN (set_fpscr, SET_FPSCR)
|
| /dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/config/arm/ |
| H A D | arm-builtins.c | 1436 FP_BUILTIN (set_fpscr, SET_FPSCR)
|