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Searched refs:SET_IABR (Results 1 – 25 of 78) sorted by relevance

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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/powerpc/cpu/mpc8260/
H A Dbedbug_603e.c210 SET_IABR( addr | 0x00000002 ); in bedbug603e_set()
231 SET_IABR( 0 ); in bedbug603e_clear()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/powerpc/cpu/mpc8260/
H A Dbedbug_603e.c210 SET_IABR( addr | 0x00000002 ); in bedbug603e_set()
231 SET_IABR( 0 ); in bedbug603e_clear()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/powerpc/cpu/mpc8260/
H A Dbedbug_603e.c210 SET_IABR( addr | 0x00000002 ); in bedbug603e_set()
231 SET_IABR( 0 ); in bedbug603e_clear()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/powerpc/cpu/mpc8260/
H A Dbedbug_603e.c210 SET_IABR( addr | 0x00000002 ); in bedbug603e_set()
231 SET_IABR( 0 ); in bedbug603e_clear()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/powerpc/cpu/mpc8260/
H A Dbedbug_603e.c210 SET_IABR( addr | 0x00000002 ); in bedbug603e_set()
231 SET_IABR( 0 ); in bedbug603e_clear()
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/powerpc/cpu/mpc8260/
H A Dbedbug_603e.c210 SET_IABR( addr | 0x00000002 ); in bedbug603e_set()
231 SET_IABR( 0 ); in bedbug603e_clear()
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/powerpc/cpu/mpc8260/
H A Dbedbug_603e.c208 SET_IABR( addr | 0x00000002 ); in bedbug603e_set()
229 SET_IABR( 0 ); in bedbug603e_clear()
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/powerpc/cpu/mpc8260/
H A Dbedbug_603e.c210 SET_IABR( addr | 0x00000002 ); in bedbug603e_set()
231 SET_IABR( 0 ); in bedbug603e_clear()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/include/bedbug/
H A Dregs.h370 #define SET_IABR(val) SET_REGISTER( "mtspr 1010,%0", val ) macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/include/bedbug/
H A Dregs.h370 #define SET_IABR(val) SET_REGISTER( "mtspr 1010,%0", val ) macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/include/bedbug/
H A Dregs.h373 #define SET_IABR(val) SET_REGISTER( "mtspr 1010,%0", val ) macro
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/include/bedbug/
H A Dregs.h370 #define SET_IABR(val) SET_REGISTER( "mtspr 1010,%0", val ) macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/include/bedbug/
H A Dregs.h370 #define SET_IABR(val) SET_REGISTER( "mtspr 1010,%0", val ) macro
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/include/bedbug/
H A Dregs.h370 #define SET_IABR(val) SET_REGISTER( "mtspr 1010,%0", val ) macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/include/bedbug/
H A Dregs.h373 #define SET_IABR(val) SET_REGISTER( "mtspr 1010,%0", val ) macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/include/bedbug/
H A Dregs.h370 #define SET_IABR(val) SET_REGISTER( "mtspr 1010,%0", val ) macro
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/include/bedbug/
H A Dregs.h370 #define SET_IABR(val) SET_REGISTER( "mtspr 1010,%0", val ) macro
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/include/bedbug/
H A Dregs.h370 #define SET_IABR(val) SET_REGISTER( "mtspr 1010,%0", val ) macro
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/include/bedbug/
H A Dregs.h370 #define SET_IABR(val) SET_REGISTER( "mtspr 1010,%0", val ) macro
/dports/sysutils/u-boot-sopine/u-boot-2021.07/include/bedbug/
H A Dregs.h370 #define SET_IABR(val) SET_REGISTER( "mtspr 1010,%0", val ) macro
/dports/sysutils/u-boot-rpi/u-boot-2021.07/include/bedbug/
H A Dregs.h370 #define SET_IABR(val) SET_REGISTER( "mtspr 1010,%0", val ) macro
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/include/bedbug/
H A Dregs.h370 #define SET_IABR(val) SET_REGISTER( "mtspr 1010,%0", val ) macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/include/bedbug/
H A Dregs.h373 #define SET_IABR(val) SET_REGISTER( "mtspr 1010,%0", val ) macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/include/bedbug/
H A Dregs.h373 #define SET_IABR(val) SET_REGISTER( "mtspr 1010,%0", val ) macro
/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/include/bedbug/
H A Dregs.h370 #define SET_IABR(val) SET_REGISTER( "mtspr 1010,%0", val ) macro

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