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Searched refs:SFPP0_TxDisable (Results 1 – 3 of 3) sorted by relevance

/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/x300/
H A Dx300.v227 output SFPP0_TxDisable, // These are actually open drain outputs port
991 .sfpp_tx_disable(SFPP0_TxDisable),
H A Dx300.xdc603 set_property PACKAGE_PIN V21 [get_ports SFPP0_TxDisable] ;# Open drain output
604 set_property IOSTANDARD LVCMOS33 [get_ports SFPP0_TxDisable]
H A Dx300_core.v54 output SFPP0_TxDisable, // Assert low to enable transmitter. port