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/dports/devel/avr-libc/avr-libc-2.0.0/include/avr/
H A Dsleep.h169 EMCUCR = ((EMCUCR & ~_BV(SM0)) | ((mode) == SLEEP_MODE_PWR_SAVE ? _BV(SM0) : 0)); \
180 …EMCUCR = ((EMCUCR & ~_BV(SM0)) | ((mode) == SLEEP_MODE_PWR_SAVE || (mode) == SLEEP_MODE_EXT_STANDB…
215 _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1) | _BV(SM2))) | (mode)); \
222 _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1))) | (mode)); \
H A Dio76c711.h181 #define SM0 3 macro
497 #define SLEEP_MODE_ADC _BV(SM0)
499 #define SLEEP_MODE_PWR_SAVE (_BV(SM0) | _BV(SM1))
H A Dio8535.h327 #define SM0 4 macro
586 #define SLEEP_MODE_ADC _BV(SM0)
588 #define SLEEP_MODE_PWR_SAVE (_BV(SM0) | _BV(SM1))
H A Dio4434.h326 #define SM0 4 macro
585 #define SLEEP_MODE_ADC _BV(SM0)
587 #define SLEEP_MODE_PWR_SAVE (_BV(SM0) | _BV(SM1))
H A Diom163.h323 #define SM0 4 macro
686 #define SLEEP_MODE_ADC _BV(SM0)
688 #define SLEEP_MODE_PWR_SAVE (_BV(SM0) | _BV(SM1))
H A Diom103.h411 #define SM0 3 macro
699 #define SLEEP_MODE_ADC _BV(SM0)
701 #define SLEEP_MODE_PWR_SAVE (_BV(SM0) | _BV(SM1))
H A Dioat94k.h339 #define SM0 3 macro
563 #define SLEEP_MODE_PWR_SAVE (_BV(SM0) | _BV(SM1))
H A Diotn15.h208 #define SM0 3 macro
H A Dioa6289.h346 #define SM0 1 macro
845 #define SLEEP_MODE_SENSOR_NOISE_REDUCTION (_BV(SM0))
/dports/science/openbabel/openbabel-3.1.1/test/pdb_ligands_sdf/
H A D3sm0_aek.sdf3 Coordinates from PDB:3SM0:A:501 Model:1 without hydrogens
116 3SM0
/dports/math/cgal/CGAL-5.3/include/CGAL/Minkowski_sum_3/
H A DGaussian_map_to_nef_3.h159 SM_decorator SM0(&*v0); in create_single_edge()
160 SVertex_handle sv0 = SM0.new_svertex(); in create_single_edge()
163 SFace_handle sf0 = SM0.new_sface(); in create_single_edge()
165 SM0.link_as_isolated_vertex(sv0, sf0); in create_single_edge()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/mlir/test/Dialect/Linalg/
H A Dbufferize.mlir166 // CHECK-NEXT: %[[SM0:.*]] = subview %[[M0]][0, 0] [2, 3] [1, 1]
168 // CHECK-NEXT: linalg.copy(%[[SM0]], %[[A0]]) : memref<2x3xf32, #[[$MAP0]]>, memref<2x3xf32>
203 // CHECK-DAG: %[[SM0:.*]] = tensor_to_memref %[[ST0]] : memref<2x3xf32>
206 // CHECK-NEXT: linalg.copy(%[[SM0]], %[[SUBVIEW0]]) : memref<2x3xf32>, memref<2x3xf32, #[[$MAP0]]>
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/mlir/test/Dialect/Linalg/
H A Dbufferize.mlir203 // CHECK-NEXT: %[[SM0:.*]] = subview %[[M0]][0, 0] [2, 3] [1, 1]
205 // CHECK-NEXT: linalg.copy(%[[SM0]], %[[A0]]) : memref<2x3xf32, #[[$MAP0]]>, memref<2x3xf32>
243 // CHECK-DAG: %[[SM0:.*]] = tensor_to_memref %[[ST0]] : memref<2x3xf32>
250 // CHECK-NEXT: linalg.copy(%[[SM0]], %[[SUBVIEW0]]) : memref<2x3xf32>, memref<2x3xf32, #[[$MAP0]]>
/dports/devel/llvm12/llvm-project-12.0.1.src/mlir/test/Dialect/Linalg/
H A Dbufferize.mlir203 // CHECK-NEXT: %[[SM0:.*]] = subview %[[M0]][0, 0] [2, 3] [1, 1]
205 // CHECK-NEXT: linalg.copy(%[[SM0]], %[[A0]]) : memref<2x3xf32, #[[$MAP0]]>, memref<2x3xf32>
243 // CHECK-DAG: %[[SM0:.*]] = tensor_to_memref %[[ST0]] : memref<2x3xf32>
250 // CHECK-NEXT: linalg.copy(%[[SM0]], %[[SUBVIEW0]]) : memref<2x3xf32>, memref<2x3xf32, #[[$MAP0]]>
/dports/math/mfem/mfem-4.3/fem/qinterp/
H A Ddet.cpp118 MFEM_SHARED double SM0[SMEM?MSZ:1]; in Det3D()
120 double *lm0 = SMEM ? SM0 : GM + MSZ*bid; in Det3D()
/dports/comms/bforce-kst/bforce-0.22.8.kst7/source/include/
H A Dprot_emsi.h61 #define SM0 0 macro
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/mlir/test/Dialect/Linalg/
H A Dbufferize.mlir177 // CHECK-NEXT: %[[SM0:.*]] = memref.subview %[[M]][0, 0] [2, 3] [1, 1]
179 // CHECK-NEXT: linalg.copy(%[[SM0]], %[[A0]]) : memref<2x3xf32, #[[$MAP0]]>, memref<2x3xf32>
216 // CHECK-DAG: %[[SM0:.*]] = memref.buffer_cast %[[ST0]] : memref<2x3xf32>
223 // CHECK-NEXT: linalg.copy(%[[SM0]], %[[SUBVIEW0]]) : memref<2x3xf32>, memref<2x3xf32, #[[$MAP0]]>
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/mlir/test/Dialect/Linalg/
H A Dbufferize.mlir177 // CHECK-NEXT: %[[SM0:.*]] = memref.subview %[[M]][0, 0] [2, 3] [1, 1]
179 // CHECK-NEXT: linalg.copy(%[[SM0]], %[[A0]]) : memref<2x3xf32, #[[$MAP0]]>, memref<2x3xf32>
216 // CHECK-DAG: %[[SM0:.*]] = memref.buffer_cast %[[ST0]] : memref<2x3xf32>
223 // CHECK-NEXT: linalg.copy(%[[SM0]], %[[SUBVIEW0]]) : memref<2x3xf32>, memref<2x3xf32, #[[$MAP0]]>
/dports/devel/llvm13/llvm-project-13.0.1.src/mlir/test/Dialect/Linalg/
H A Dbufferize.mlir177 // CHECK-NEXT: %[[SM0:.*]] = memref.subview %[[M]][0, 0] [2, 3] [1, 1]
179 // CHECK-NEXT: linalg.copy(%[[SM0]], %[[A0]]) : memref<2x3xf32, #[[$MAP0]]>, memref<2x3xf32>
216 // CHECK-DAG: %[[SM0:.*]] = memref.buffer_cast %[[ST0]] : memref<2x3xf32>
223 // CHECK-NEXT: linalg.copy(%[[SM0]], %[[SUBVIEW0]]) : memref<2x3xf32>, memref<2x3xf32, #[[$MAP0]]>
/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/TigerlakeSiliconPkg/Pch/IncludePrivate/
H A DPchNvsAreaDef.h143 …UINT8 SM0[7]; ///< Offset 287 SerialIo SPI Controller 0 Mo… member
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/mlir/test/Dialect/Linalg/
H A Dbufferize.mlir177 // CHECK-NEXT: %[[SM0:.*]] = memref.subview %[[M]][0, 0] [2, 3] [1, 1]
179 // CHECK-NEXT: linalg.copy(%[[SM0]], %[[A0]]) : memref<2x3xf32, #[[$MAP0]]>, memref<2x3xf32>
216 // CHECK-DAG: %[[SM0:.*]] = memref.buffer_cast %[[ST0]] : memref<2x3xf32>
223 // CHECK-NEXT: linalg.copy(%[[SM0]], %[[SUBVIEW0]]) : memref<2x3xf32>, memref<2x3xf32, #[[$MAP0]]>
/dports/lang/sdcc/sdcc-4.0.0/device/include/mcs51/
H A DuPSD33xx.h194 SBIT(SM0, 0x98, 7); // Serial Port Mode Bit 0.
388 SBIT(SM0, 0x98, 7); // Serial Port Mode Bit 0.
H A D8051.h95 __sbit __at (0x9F) SM0 ;
/dports/comms/limesuite/LimeSuite-20.10.0/mcu_program/mcu_src/
H A DLMS7002_REGx51.h112 sbit SM0 = 0x9F; variable
/dports/devel/tpasm/tpasm1.11/include/
H A D8051.inc69 SM0 EQU 09FH

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