/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AMDGPU/ |
H A D | SIFrameLowering.cpp | 384 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchSetup() local 387 BuildMI(MBB, I, DL, SMovB32, RsrcHi) in emitEntryFunctionScratchSetup() 409 BuildMI(MBB, I, DL, SMovB32, RsrcLo) in emitEntryFunctionScratchSetup() 437 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchSetup() local 477 BuildMI(MBB, I, DL, SMovB32, Rsrc0) in emitEntryFunctionScratchSetup() 481 BuildMI(MBB, I, DL, SMovB32, Rsrc1) in emitEntryFunctionScratchSetup() 487 BuildMI(MBB, I, DL, SMovB32, Rsrc2) in emitEntryFunctionScratchSetup() 491 BuildMI(MBB, I, DL, SMovB32, Rsrc3) in emitEntryFunctionScratchSetup()
|
/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AMDGPU/ |
H A D | SIFrameLowering.cpp | 384 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchSetup() local 387 BuildMI(MBB, I, DL, SMovB32, RsrcHi) in emitEntryFunctionScratchSetup() 409 BuildMI(MBB, I, DL, SMovB32, RsrcLo) in emitEntryFunctionScratchSetup() 437 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchSetup() local 477 BuildMI(MBB, I, DL, SMovB32, Rsrc0) in emitEntryFunctionScratchSetup() 481 BuildMI(MBB, I, DL, SMovB32, Rsrc1) in emitEntryFunctionScratchSetup() 487 BuildMI(MBB, I, DL, SMovB32, Rsrc2) in emitEntryFunctionScratchSetup() 491 BuildMI(MBB, I, DL, SMovB32, Rsrc3) in emitEntryFunctionScratchSetup()
|
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIFrameLowering.cpp | 550 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchSetup() local 553 BuildMI(MBB, I, DL, SMovB32, RsrcHi) in emitEntryFunctionScratchSetup() 575 BuildMI(MBB, I, DL, SMovB32, RsrcLo) in emitEntryFunctionScratchSetup() 603 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchSetup() local 644 BuildMI(MBB, I, DL, SMovB32, Rsrc0) in emitEntryFunctionScratchSetup() 648 BuildMI(MBB, I, DL, SMovB32, Rsrc1) in emitEntryFunctionScratchSetup() 654 BuildMI(MBB, I, DL, SMovB32, Rsrc2) in emitEntryFunctionScratchSetup() 658 BuildMI(MBB, I, DL, SMovB32, Rsrc3) in emitEntryFunctionScratchSetup()
|
/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AMDGPU/ |
H A D | SIFrameLowering.cpp | 550 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchSetup() local 553 BuildMI(MBB, I, DL, SMovB32, RsrcHi) in emitEntryFunctionScratchSetup() 575 BuildMI(MBB, I, DL, SMovB32, RsrcLo) in emitEntryFunctionScratchSetup() 603 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchSetup() local 644 BuildMI(MBB, I, DL, SMovB32, Rsrc0) in emitEntryFunctionScratchSetup() 648 BuildMI(MBB, I, DL, SMovB32, Rsrc1) in emitEntryFunctionScratchSetup() 654 BuildMI(MBB, I, DL, SMovB32, Rsrc2) in emitEntryFunctionScratchSetup() 658 BuildMI(MBB, I, DL, SMovB32, Rsrc3) in emitEntryFunctionScratchSetup()
|
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
H A D | SIFrameLowering.cpp | 550 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchSetup() local 553 BuildMI(MBB, I, DL, SMovB32, RsrcHi) in emitEntryFunctionScratchSetup() 575 BuildMI(MBB, I, DL, SMovB32, RsrcLo) in emitEntryFunctionScratchSetup() 603 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchSetup() local 644 BuildMI(MBB, I, DL, SMovB32, Rsrc0) in emitEntryFunctionScratchSetup() 648 BuildMI(MBB, I, DL, SMovB32, Rsrc1) in emitEntryFunctionScratchSetup() 654 BuildMI(MBB, I, DL, SMovB32, Rsrc2) in emitEntryFunctionScratchSetup() 658 BuildMI(MBB, I, DL, SMovB32, Rsrc3) in emitEntryFunctionScratchSetup()
|
/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AMDGPU/ |
H A D | SIFrameLowering.cpp | 546 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchSetup() local 549 BuildMI(MBB, I, DL, SMovB32, RsrcHi) in emitEntryFunctionScratchSetup() 571 BuildMI(MBB, I, DL, SMovB32, RsrcLo) in emitEntryFunctionScratchSetup() 602 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchSetup() local 646 BuildMI(MBB, I, DL, SMovB32, Rsrc0) in emitEntryFunctionScratchSetup() 650 BuildMI(MBB, I, DL, SMovB32, Rsrc1) in emitEntryFunctionScratchSetup() 656 BuildMI(MBB, I, DL, SMovB32, Rsrc2) in emitEntryFunctionScratchSetup() 660 BuildMI(MBB, I, DL, SMovB32, Rsrc3) in emitEntryFunctionScratchSetup()
|
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AMDGPU/ |
H A D | SIFrameLowering.cpp | 497 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchRsrcRegSetup() local 500 BuildMI(MBB, I, DL, SMovB32, RsrcHi) in emitEntryFunctionScratchRsrcRegSetup() 510 BuildMI(MBB, I, DL, SMovB32, RsrcLo) in emitEntryFunctionScratchRsrcRegSetup() 535 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchRsrcRegSetup() local 576 BuildMI(MBB, I, DL, SMovB32, Rsrc0) in emitEntryFunctionScratchRsrcRegSetup() 580 BuildMI(MBB, I, DL, SMovB32, Rsrc1) in emitEntryFunctionScratchRsrcRegSetup() 586 BuildMI(MBB, I, DL, SMovB32, Rsrc2) in emitEntryFunctionScratchRsrcRegSetup() 590 BuildMI(MBB, I, DL, SMovB32, Rsrc3) in emitEntryFunctionScratchRsrcRegSetup()
|
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AMDGPU/ |
H A D | SIFrameLowering.cpp | 497 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchRsrcRegSetup() local 500 BuildMI(MBB, I, DL, SMovB32, RsrcHi) in emitEntryFunctionScratchRsrcRegSetup() 510 BuildMI(MBB, I, DL, SMovB32, RsrcLo) in emitEntryFunctionScratchRsrcRegSetup() 535 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchRsrcRegSetup() local 576 BuildMI(MBB, I, DL, SMovB32, Rsrc0) in emitEntryFunctionScratchRsrcRegSetup() 580 BuildMI(MBB, I, DL, SMovB32, Rsrc1) in emitEntryFunctionScratchRsrcRegSetup() 586 BuildMI(MBB, I, DL, SMovB32, Rsrc2) in emitEntryFunctionScratchRsrcRegSetup() 590 BuildMI(MBB, I, DL, SMovB32, Rsrc3) in emitEntryFunctionScratchRsrcRegSetup()
|
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AMDGPU/ |
H A D | SIFrameLowering.cpp | 576 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchRsrcRegSetup() local 579 BuildMI(MBB, I, DL, SMovB32, RsrcHi) in emitEntryFunctionScratchRsrcRegSetup() 589 BuildMI(MBB, I, DL, SMovB32, RsrcLo) in emitEntryFunctionScratchRsrcRegSetup() 614 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchRsrcRegSetup() local 655 BuildMI(MBB, I, DL, SMovB32, Rsrc0) in emitEntryFunctionScratchRsrcRegSetup() 659 BuildMI(MBB, I, DL, SMovB32, Rsrc1) in emitEntryFunctionScratchRsrcRegSetup() 665 BuildMI(MBB, I, DL, SMovB32, Rsrc2) in emitEntryFunctionScratchRsrcRegSetup() 669 BuildMI(MBB, I, DL, SMovB32, Rsrc3) in emitEntryFunctionScratchRsrcRegSetup()
|
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | SIFrameLowering.cpp | 171 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in buildGitPtr() local 176 BuildMI(MBB, I, DL, SMovB32, TargetHi) in buildGitPtr() 186 BuildMI(MBB, I, DL, SMovB32, TargetLo) in buildGitPtr() 579 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchRsrcRegSetup() local 619 BuildMI(MBB, I, DL, SMovB32, Rsrc0) in emitEntryFunctionScratchRsrcRegSetup() 623 BuildMI(MBB, I, DL, SMovB32, Rsrc1) in emitEntryFunctionScratchRsrcRegSetup() 629 BuildMI(MBB, I, DL, SMovB32, Rsrc2) in emitEntryFunctionScratchRsrcRegSetup() 633 BuildMI(MBB, I, DL, SMovB32, Rsrc3) in emitEntryFunctionScratchRsrcRegSetup()
|
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AMDGPU/ |
H A D | SIFrameLowering.cpp | 171 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in buildGitPtr() local 176 BuildMI(MBB, I, DL, SMovB32, TargetHi) in buildGitPtr() 186 BuildMI(MBB, I, DL, SMovB32, TargetLo) in buildGitPtr() 579 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchRsrcRegSetup() local 619 BuildMI(MBB, I, DL, SMovB32, Rsrc0) in emitEntryFunctionScratchRsrcRegSetup() 623 BuildMI(MBB, I, DL, SMovB32, Rsrc1) in emitEntryFunctionScratchRsrcRegSetup() 629 BuildMI(MBB, I, DL, SMovB32, Rsrc2) in emitEntryFunctionScratchRsrcRegSetup() 633 BuildMI(MBB, I, DL, SMovB32, Rsrc3) in emitEntryFunctionScratchRsrcRegSetup()
|
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | SIFrameLowering.cpp | 302 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in buildGitPtr() local 307 BuildMI(MBB, I, DL, SMovB32, TargetHi) in buildGitPtr() 317 BuildMI(MBB, I, DL, SMovB32, TargetLo) in buildGitPtr() 690 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchRsrcRegSetup() local 731 BuildMI(MBB, I, DL, SMovB32, Rsrc0) in emitEntryFunctionScratchRsrcRegSetup() 735 BuildMI(MBB, I, DL, SMovB32, Rsrc1) in emitEntryFunctionScratchRsrcRegSetup() 741 BuildMI(MBB, I, DL, SMovB32, Rsrc2) in emitEntryFunctionScratchRsrcRegSetup() 745 BuildMI(MBB, I, DL, SMovB32, Rsrc3) in emitEntryFunctionScratchRsrcRegSetup()
|
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIFrameLowering.cpp | 171 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in buildGitPtr() local 176 BuildMI(MBB, I, DL, SMovB32, TargetHi) in buildGitPtr() 186 BuildMI(MBB, I, DL, SMovB32, TargetLo) in buildGitPtr() 579 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchRsrcRegSetup() local 619 BuildMI(MBB, I, DL, SMovB32, Rsrc0) in emitEntryFunctionScratchRsrcRegSetup() 623 BuildMI(MBB, I, DL, SMovB32, Rsrc1) in emitEntryFunctionScratchRsrcRegSetup() 629 BuildMI(MBB, I, DL, SMovB32, Rsrc2) in emitEntryFunctionScratchRsrcRegSetup() 633 BuildMI(MBB, I, DL, SMovB32, Rsrc3) in emitEntryFunctionScratchRsrcRegSetup()
|
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AMDGPU/ |
H A D | SIFrameLowering.cpp | 171 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in buildGitPtr() local 176 BuildMI(MBB, I, DL, SMovB32, TargetHi) in buildGitPtr() 186 BuildMI(MBB, I, DL, SMovB32, TargetLo) in buildGitPtr() 579 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchRsrcRegSetup() local 619 BuildMI(MBB, I, DL, SMovB32, Rsrc0) in emitEntryFunctionScratchRsrcRegSetup() 623 BuildMI(MBB, I, DL, SMovB32, Rsrc1) in emitEntryFunctionScratchRsrcRegSetup() 629 BuildMI(MBB, I, DL, SMovB32, Rsrc2) in emitEntryFunctionScratchRsrcRegSetup() 633 BuildMI(MBB, I, DL, SMovB32, Rsrc3) in emitEntryFunctionScratchRsrcRegSetup()
|
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | SIFrameLowering.cpp | 171 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in buildGitPtr() local 176 BuildMI(MBB, I, DL, SMovB32, TargetHi) in buildGitPtr() 186 BuildMI(MBB, I, DL, SMovB32, TargetLo) in buildGitPtr() 579 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchRsrcRegSetup() local 619 BuildMI(MBB, I, DL, SMovB32, Rsrc0) in emitEntryFunctionScratchRsrcRegSetup() 623 BuildMI(MBB, I, DL, SMovB32, Rsrc1) in emitEntryFunctionScratchRsrcRegSetup() 629 BuildMI(MBB, I, DL, SMovB32, Rsrc2) in emitEntryFunctionScratchRsrcRegSetup() 633 BuildMI(MBB, I, DL, SMovB32, Rsrc3) in emitEntryFunctionScratchRsrcRegSetup()
|
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | SIFrameLowering.cpp | 302 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in buildGitPtr() local 307 BuildMI(MBB, I, DL, SMovB32, TargetHi) in buildGitPtr() 317 BuildMI(MBB, I, DL, SMovB32, TargetLo) in buildGitPtr() 690 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchRsrcRegSetup() local 731 BuildMI(MBB, I, DL, SMovB32, Rsrc0) in emitEntryFunctionScratchRsrcRegSetup() 735 BuildMI(MBB, I, DL, SMovB32, Rsrc1) in emitEntryFunctionScratchRsrcRegSetup() 741 BuildMI(MBB, I, DL, SMovB32, Rsrc2) in emitEntryFunctionScratchRsrcRegSetup() 745 BuildMI(MBB, I, DL, SMovB32, Rsrc3) in emitEntryFunctionScratchRsrcRegSetup()
|
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | SIFrameLowering.cpp | 171 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in buildGitPtr() local 176 BuildMI(MBB, I, DL, SMovB32, TargetHi) in buildGitPtr() 186 BuildMI(MBB, I, DL, SMovB32, TargetLo) in buildGitPtr() 579 const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32); in emitEntryFunctionScratchRsrcRegSetup() local 619 BuildMI(MBB, I, DL, SMovB32, Rsrc0) in emitEntryFunctionScratchRsrcRegSetup() 623 BuildMI(MBB, I, DL, SMovB32, Rsrc1) in emitEntryFunctionScratchRsrcRegSetup() 629 BuildMI(MBB, I, DL, SMovB32, Rsrc2) in emitEntryFunctionScratchRsrcRegSetup() 633 BuildMI(MBB, I, DL, SMovB32, Rsrc3) in emitEntryFunctionScratchRsrcRegSetup()
|