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Searched refs:SPI_CR1_RXONLY_Msk (Results 1 – 12 of 12) sorted by relevance

/dports/security/py-pyvex/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/
H A Dstm32l152xe.h5746 #define SPI_CR1_RXONLY_Msk (0x1U << SPI_CR1_RXONLY_Pos) /*!< 0x00000400 */ macro
5747 #define SPI_CR1_RXONLY SPI_CR1_RXONLY_Msk /*!< Receive only */
/dports/devel/py-cle/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/
H A Dstm32l152xe.h5746 #define SPI_CR1_RXONLY_Msk (0x1U << SPI_CR1_RXONLY_Pos) /*!< 0x00000400 */ macro
5747 #define SPI_CR1_RXONLY SPI_CR1_RXONLY_Msk /*!< Receive only */
/dports/security/py-angr/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/
H A Dstm32l152xe.h5746 #define SPI_CR1_RXONLY_Msk (0x1U << SPI_CR1_RXONLY_Pos) /*!< 0x00000400 */ macro
5747 #define SPI_CR1_RXONLY SPI_CR1_RXONLY_Msk /*!< Receive only */
/dports/security/py-ailment/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/
H A Dstm32l152xe.h5746 #define SPI_CR1_RXONLY_Msk (0x1U << SPI_CR1_RXONLY_Pos) /*!< 0x00000400 */ macro
5747 #define SPI_CR1_RXONLY SPI_CR1_RXONLY_Msk /*!< Receive only */
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_g4xx/
H A Dstm32g431xx.h9436 #define SPI_CR1_RXONLY_Msk (0x1UL << SPI_CR1_RXONLY_Pos) /*!< 0x00000400 */ macro
9437 #define SPI_CR1_RXONLY SPI_CR1_RXONLY_Msk /*!<Receive only …
H A Dstm32gbk1cb.h9408 #define SPI_CR1_RXONLY_Msk (0x1UL << SPI_CR1_RXONLY_Pos) /*!< 0x00000400 */ macro
9409 #define SPI_CR1_RXONLY SPI_CR1_RXONLY_Msk /*!<Receive only …
H A Dstm32g441xx.h9667 #define SPI_CR1_RXONLY_Msk (0x1UL << SPI_CR1_RXONLY_Pos) /*!< 0x00000400 */ macro
9668 #define SPI_CR1_RXONLY SPI_CR1_RXONLY_Msk /*!<Receive only …
H A Dstm32g471xx.h9875 #define SPI_CR1_RXONLY_Msk (0x1UL << SPI_CR1_RXONLY_Pos) /*!< 0x00000400 */ macro
9876 #define SPI_CR1_RXONLY SPI_CR1_RXONLY_Msk /*!<Receive only …
H A Dstm32g473xx.h10649 #define SPI_CR1_RXONLY_Msk (0x1UL << SPI_CR1_RXONLY_Pos) /*!< 0x00000400 */ macro
10650 #define SPI_CR1_RXONLY SPI_CR1_RXONLY_Msk /*!<Receive only …
H A Dstm32g483xx.h10880 #define SPI_CR1_RXONLY_Msk (0x1UL << SPI_CR1_RXONLY_Pos) /*!< 0x00000400 */ macro
10881 #define SPI_CR1_RXONLY SPI_CR1_RXONLY_Msk /*!<Receive only …
H A Dstm32g474xx.h14011 #define SPI_CR1_RXONLY_Msk (0x1UL << SPI_CR1_RXONLY_Pos) /*!< 0x00000400 */ macro
14012 #define SPI_CR1_RXONLY SPI_CR1_RXONLY_Msk /*!<Receive only …
H A Dstm32g484xx.h14242 #define SPI_CR1_RXONLY_Msk (0x1UL << SPI_CR1_RXONLY_Pos) /*!< 0x00000400 */ macro
14243 #define SPI_CR1_RXONLY SPI_CR1_RXONLY_Msk /*!<Receive only …