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Searched refs:SPSR_s (Results 1 – 25 of 90) sorted by relevance

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/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/gas/testsuite/gas/arm/
H A Darch4t.s32 msr SPSR_s, r10
/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/gas/testsuite/gas/arm/
H A Darch4t.s32 msr SPSR_s, r10
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/gas/testsuite/gas/arm/
H A Darch4t.s32 msr SPSR_s, r10
/dports/lang/gnatdroid-binutils-x86/binutils-2.27/gas/testsuite/gas/arm/
H A Darch4t.s32 msr SPSR_s, r10
H A Darch4t.d33 0+5c <[^>]+> e164f00a ? msr SPSR_s, sl
H A Darch4t-eabi.d35 0+5c <[^>]+> e164f00a ? msr SPSR_s, sl
/dports/devel/arm-elf-binutils/binutils-2.37/gas/testsuite/gas/arm/
H A Darch4t.s32 msr SPSR_s, r10
H A Darch4t-eabi.d35 0+5c <[^>]+> e164f00a ? msr SPSR_s, sl
H A Darch4t.d33 0+5c <[^>]+> e164f00a ? msr SPSR_s, sl
/dports/devel/gnulibiberty/binutils-2.37/gas/testsuite/gas/arm/
H A Darch4t.s32 msr SPSR_s, r10
H A Darch4t-eabi.d35 0+5c <[^>]+> e164f00a ? msr SPSR_s, sl
H A Darch4t.d33 0+5c <[^>]+> e164f00a ? msr SPSR_s, sl
/dports/lang/gnatdroid-binutils/binutils-2.27/gas/testsuite/gas/arm/
H A Darch4t.s32 msr SPSR_s, r10
H A Darch4t.d33 0+5c <[^>]+> e164f00a ? msr SPSR_s, sl
H A Darch4t-eabi.d35 0+5c <[^>]+> e164f00a ? msr SPSR_s, sl
/dports/devel/djgpp-binutils/binutils-2.17/gas/testsuite/gas/arm/
H A Darch4t.s32 msr SPSR_s, r10
H A Darch4t.d31 0+5c <[^>]+> e164f00a ? msr SPSR_s, sl
/dports/devel/binutils/binutils-2.37/gas/testsuite/gas/arm/
H A Darch4t.s32 msr SPSR_s, r10
H A Darch4t-eabi.d35 0+5c <[^>]+> e164f00a ? msr SPSR_s, sl
H A Darch4t.d33 0+5c <[^>]+> e164f00a ? msr SPSR_s, sl
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/ARM/
H A Dspecial-reg-acore.ll40 ; ACORE: msr SPSR_s, r0
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/ARM/
H A Dspecial-reg-acore.ll40 ; ACORE: msr SPSR_s, r0
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/ARM/
H A Dspecial-reg-acore.ll40 ; ACORE: msr SPSR_s, r0
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/ARM/
H A Dspecial-reg-acore.ll40 ; ACORE: msr SPSR_s, r0
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/ARM/
H A Dspecial-reg-acore.ll40 ; ACORE: msr SPSR_s, r0

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