| /dports/lang/go-devel/go-becaeea1199b875bc24800fa88f2f4fea119bf78/src/cmd/asm/internal/asm/testdata/ |
| H A D | mips64.s | 409 SRAV R20, R19, R19 // 02939817
422 SRAV R20, R19 // 02939817
435 SRAV $19, R8, R7 // 00083cfb
448 SRAV $12, R3 // 00031b3b
|
| /dports/lang/go-devel/go-becaeea1199b875bc24800fa88f2f4fea119bf78/src/cmd/compile/internal/ssa/gen/ |
| H A D | MIPS64.rules | 91 (Rsh64x64 <t> x y) => (SRAV x (OR <t> (NEGV <t> (SGTU y (MOVVconst <typ.UInt64> [63]))) y))
92 (Rsh64x32 <t> x y) => (SRAV x (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (MOVVconst <typ.UInt64> [63…
93 (Rsh64x16 <t> x y) => (SRAV x (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (MOVVconst <typ.UInt64> [63…
94 (Rsh64x8 <t> x y) => (SRAV x (OR <t> (NEGV <t> (SGTU (ZeroExt8to64 y) (MOVVconst <typ.UInt64> [63…
96 (Rsh32x64 <t> x y) => (SRAV (SignExt32to64 x) (OR <t> (NEGV <t> (SGTU y (MOVVconst <typ.UInt64> [63…
101 (Rsh16x64 <t> x y) => (SRAV (SignExt16to64 x) (OR <t> (NEGV <t> (SGTU y (MOVVconst <typ.UInt64> [63…
106 (Rsh8x64 <t> x y) => (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU y (MOVVconst <typ.UInt64> [63])…
107 (Rsh8x32 <t> x y) => (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (MOVVconst <t…
108 (Rsh8x16 <t> x y) => (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (MOVVconst <t…
577 (SRAV x (MOVVconst [c])) && uint64(c)>=64 => (SRAVconst x [63])
[all …]
|
| /dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/Mips/GlobalISel/instruction-select/ |
| H A D | bitwise.mir | 195 ; MIPS32: [[SRAV:%[0-9]+]]:gpr32 = SRAV [[COPY]], [[COPY1]]
196 ; MIPS32: $v0 = COPY [[SRAV]]
|
| /dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/Mips/GlobalISel/instruction-select/ |
| H A D | bitwise.mir | 195 ; MIPS32: [[SRAV:%[0-9]+]]:gpr32 = SRAV [[COPY]], [[COPY1]]
196 ; MIPS32: $v0 = COPY [[SRAV]]
|
| /dports/lang/go-devel/go-dragonfly-amd64-bootstrap/src/cmd/compile/internal/ssa/gen/ |
| H A D | MIPS64.rules | 89 (Rsh64x64 <t> x y) -> (SRAV x (OR <t> (NEGV <t> (SGTU y (MOVVconst <typ.UInt64> [63]))) y))
90 (Rsh64x32 <t> x y) -> (SRAV x (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (MOVVconst <typ.UInt64> [63…
91 (Rsh64x16 <t> x y) -> (SRAV x (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (MOVVconst <typ.UInt64> [63…
92 (Rsh64x8 <t> x y) -> (SRAV x (OR <t> (NEGV <t> (SGTU (ZeroExt8to64 y) (MOVVconst <typ.UInt64> [63…
94 (Rsh32x64 <t> x y) -> (SRAV (SignExt32to64 x) (OR <t> (NEGV <t> (SGTU y (MOVVconst <typ.UInt64> [63…
99 (Rsh16x64 <t> x y) -> (SRAV (SignExt16to64 x) (OR <t> (NEGV <t> (SGTU y (MOVVconst <typ.UInt64> [63…
104 (Rsh8x64 <t> x y) -> (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU y (MOVVconst <typ.UInt64> [63])…
105 (Rsh8x32 <t> x y) -> (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (MOVVconst <t…
106 (Rsh8x16 <t> x y) -> (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (MOVVconst <t…
597 (SRAV x (MOVVconst [c])) && uint64(c)>=64 -> (SRAVconst x [63])
[all …]
|
| /dports/net/google-cloud-sdk-app-engine-go/platform/google_appengine/goroot-1.9/src/cmd/compile/internal/ssa/gen/ |
| H A D | MIPS64.rules | 114 (Rsh64x64 <t> x y) -> (SRAV x (OR <t> (NEGV <t> (SGTU y (Const64 <typ.UInt64> [63]))) y))
115 (Rsh64x32 <t> x y) -> (SRAV x (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (Const64 <typ.UInt64> [63])…
116 (Rsh64x16 <t> x y) -> (SRAV x (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (Const64 <typ.UInt64> [63])…
117 (Rsh64x8 <t> x y) -> (SRAV x (OR <t> (NEGV <t> (SGTU (ZeroExt8to64 y) (Const64 <typ.UInt64> [63])…
119 (Rsh32x64 <t> x y) -> (SRAV (SignExt32to64 x) (OR <t> (NEGV <t> (SGTU y (Const64 <typ.UInt64> [63])…
124 (Rsh16x64 <t> x y) -> (SRAV (SignExt16to64 x) (OR <t> (NEGV <t> (SGTU y (Const64 <typ.UInt64> [63])…
129 (Rsh8x64 <t> x y) -> (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU y (Const64 <typ.UInt64> [63])))…
130 (Rsh8x32 <t> x y) -> (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (Const64 <typ…
131 (Rsh8x16 <t> x y) -> (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (Const64 <typ…
591 (SRAV x (MOVVconst [c])) && uint64(c)>=64 -> (SRAVconst x [63])
[all …]
|
| /dports/cad/cascade-compiler/cascade-f4f7ae8bd1dd379790c0e58c286df90b8d1cdcde/share/cascade/test/benchmark/mips32/asm/ |
| H A D | mips32.yy | 52 SRAV "srav"
140 | SRAV REG COMMA REG COMMA REG {
|
| /dports/emulators/qemu-utils/qemu-4.2.1/tests/tcg/mips/include/ |
| H A D | wrappers_mips64r6.h | 68 DO_MIPS64R6__RD__RS_RT(SRAV, srav)
|
| /dports/emulators/qemu5/qemu-5.2.0/tests/tcg/mips/include/ |
| H A D | wrappers_mips64r6.h | 68 DO_MIPS64R6__RD__RS_RT(SRAV, srav)
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/tests/tcg/mips/include/ |
| H A D | wrappers_mips64r6.h | 68 DO_MIPS64R6__RD__RS_RT(SRAV, srav)
|
| /dports/emulators/qemu42/qemu-4.2.1/tests/tcg/mips/include/ |
| H A D | wrappers_mips64r6.h | 68 DO_MIPS64R6__RD__RS_RT(SRAV, srav)
|
| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/tests/tcg/mips/include/ |
| H A D | wrappers_mips64r6.h | 68 DO_MIPS64R6__RD__RS_RT(SRAV, srav)
|
| /dports/emulators/qemu/qemu-6.2.0/tests/tcg/mips/include/ |
| H A D | wrappers_mips64r6.h | 68 DO_MIPS64R6__RD__RS_RT(SRAV, srav)
|
| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/tests/tcg/mips/include/ |
| H A D | wrappers_mips64r6.h | 68 DO_MIPS64R6__RD__RS_RT(SRAV, srav)
|
| /dports/emulators/qemu60/qemu-6.0.0/tests/tcg/mips/include/ |
| H A D | wrappers_mips64r6.h | 68 DO_MIPS64R6__RD__RS_RT(SRAV, srav)
|
| /dports/games/libretro-fbneo/FBNeo-bbe3c05/src/cpu/mips3/ |
| H A D | mips3_shift.h | 45 void mips3::SRAV(uint32_t opcode) in SRAV() function
|
| /dports/games/libretro-fbalpha/fbalpha-84eb9d9/src/cpu/mips3/ |
| H A D | mips3_shift.h | 45 void mips3::SRAV(uint32_t opcode) in SRAV() function
|
| /dports/games/libretro-play/Play--3cd0a367b5e24c061a6310c68c9fa7f6b531ebd4/Source/ |
| H A D | MIPSAssembler.h | 87 void SRAV(unsigned int, unsigned int, unsigned int);
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/ |
| H A D | bitwise.mir | 341 ; MIPS32: [[SRAV:%[0-9]+]]:gpr32 = SRAV [[COPY]], [[COPY1]]
342 ; MIPS32: $v0 = COPY [[SRAV]]
|
| /dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/Mips/GlobalISel/instruction-select/ |
| H A D | bitwise.mir | 341 ; MIPS32: [[SRAV:%[0-9]+]]:gpr32 = SRAV [[COPY]], [[COPY1]]
342 ; MIPS32: $v0 = COPY [[SRAV]]
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/ |
| H A D | bitwise.mir | 341 ; MIPS32: [[SRAV:%[0-9]+]]:gpr32 = SRAV [[COPY]], [[COPY1]]
342 ; MIPS32: $v0 = COPY [[SRAV]]
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/ |
| H A D | bitwise.mir | 341 ; MIPS32: [[SRAV:%[0-9]+]]:gpr32 = SRAV [[COPY]], [[COPY1]]
342 ; MIPS32: $v0 = COPY [[SRAV]]
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/ |
| H A D | bitwise.mir | 341 ; MIPS32: [[SRAV:%[0-9]+]]:gpr32 = SRAV [[COPY]], [[COPY1]]
342 ; MIPS32: $v0 = COPY [[SRAV]]
|
| /dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/Mips/GlobalISel/instruction-select/ |
| H A D | bitwise.mir | 341 ; MIPS32: [[SRAV:%[0-9]+]]:gpr32 = SRAV [[COPY]], [[COPY1]]
342 ; MIPS32: $v0 = COPY [[SRAV]]
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/ |
| H A D | bitwise.mir | 341 ; MIPS32: [[SRAV:%[0-9]+]]:gpr32 = SRAV [[COPY]], [[COPY1]]
342 ; MIPS32: $v0 = COPY [[SRAV]]
|