Searched refs:SRL16E (Results 1 – 20 of 20) sorted by relevance
| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/rfnoc/fosphor/ |
| H A D | delay.v | 45 SRL16E srl_I (
109 SRL16E srl_I (
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| H A D | fifo_srl.v | 96 SRL16E srl_I (
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| /dports/cad/yosys/yosys-yosys-0.12/tests/arch/xilinx/ |
| H A D | nosrl.ys | 29 select -assert-count 1 t:SRL16E
30 select -assert-none t:BUFG t:SRL16E %% t:* %D
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/simple_gemac/ |
| H A D | delay_line.v | 22 SRL16E
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp2/simple_gemac/ |
| H A D | delay_line.v | 31 SRL16E
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp2/control_lib/ |
| H A D | srl.v | 31 SRL16E
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| H A D | shortfifo.v | 38 SRL16E
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp2/models/ |
| H A D | SRL16E.v | 23 module SRL16E (Q, A0, A1, A2, A3, CE, CLK, D); module
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/dsp/ |
| H A D | srl.v | 23 SRL16E
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| H A D | variable_delay_line.v | 108 SRL16E #(
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| /dports/security/john/john-1.9.0-jumbo-1/src/ztex/fpga-sha256crypt/sha256crypt/sha256core/ |
| H A D | shreg.v | 28 SRL16E #(
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| /dports/security/john/john-1.9.0-jumbo-1/src/ztex/fpga-sha512crypt/sha512crypt/sha512core/ |
| H A D | shreg.v | 28 SRL16E #(
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| /dports/security/john/john-1.9.0-jumbo-1/src/ztex/fpga-md5crypt/md5crypt/md5core/ |
| H A D | shreg.v | 28 SRL16E #(
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| H A D | shreg_ff.v | 31 SRL16E #(
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/fifo/ |
| H A D | shortfifo.v | 29 SRL16E
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp2/fifo/ |
| H A D | fifo_short.v | 45 SRL16E
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| /dports/cad/yosys/yosys-yosys-0.12/techlibs/xilinx/ |
| H A D | cells_map.v | 65 …SRL16E #(.INIT(INIT_R), .IS_CLK_INVERTED(~CLKPOL[0])) _TECHMAP_REPLACE_ (.A0(L[0]), .A1(L[1]), .A2…
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| H A D | cells_sim.v | 2276 module SRL16E ( module
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp2/extramfifo/ |
| H A D | ila.v | 1912 SRL16E #(
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/host/cmake/debian/ |
| H A D | copyright | 656 fpga/usrp2/models/SRL16E.v
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