Searched refs:SR_I1 (Results 1 – 20 of 20) sorted by relevance
72 SR_I1 = (1<<SR_I1_BIT) /**< IPL mask #1. */, enumerator
86 #define SR_I1 (1<< 9) // Interrupt mask level (bit 2) macro
67 (1u << SR_I3) | (1u << SR_I2) | (1u << SR_I1) | (1u << SR_I0); in superh_cpu_reset()
44 #define SR_I1 5 macro
68 (1u << SR_I3) | (1u << SR_I2) | (1u << SR_I1) | (1u << SR_I0); in superh_cpu_reset()
60 #define SR_I1 5 macro
85 (1u << SR_I3) | (1u << SR_I2) | (1u << SR_I1) | (1u << SR_I0); in superh_cpu_reset()