/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/ARM/ |
H A D | ARMCallingConv.cpp | 155 static const MCPhysReg SRegList[] = { ARM::S0, ARM::S1, ARM::S2, ARM::S3, variable 214 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 260 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 309 SRegList); in CC_ARM_AAPCS_VFP_Custom_f16()
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/ARM/ |
H A D | ARMCallingConv.cpp | 155 static const MCPhysReg SRegList[] = { ARM::S0, ARM::S1, ARM::S2, ARM::S3, variable 214 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 260 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 309 SRegList); in CC_ARM_AAPCS_VFP_Custom_f16()
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMCallingConv.cpp | 155 static const MCPhysReg SRegList[] = { ARM::S0, ARM::S1, ARM::S2, ARM::S3, 214 RegList = SRegList; 262 RegList = SRegList; 313 SRegList);
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/ARM/ |
H A D | ARMCallingConv.cpp | 155 static const MCPhysReg SRegList[] = { ARM::S0, ARM::S1, ARM::S2, ARM::S3, variable 214 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 262 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 313 SRegList); in CC_ARM_AAPCS_VFP_Custom_f16()
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMCallingConv.cpp | 155 static const MCPhysReg SRegList[] = { ARM::S0, ARM::S1, ARM::S2, ARM::S3, variable 214 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 260 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 309 SRegList); in CC_ARM_AAPCS_VFP_Custom_f16()
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/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/ARM/ |
H A D | ARMCallingConv.cpp | 155 static const MCPhysReg SRegList[] = { ARM::S0, ARM::S1, ARM::S2, ARM::S3, variable 214 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 260 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 309 SRegList); in CC_ARM_AAPCS_VFP_Custom_f16()
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMCallingConv.cpp | 155 static const MCPhysReg SRegList[] = { ARM::S0, ARM::S1, ARM::S2, ARM::S3, variable 214 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 262 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 313 SRegList); in CC_ARM_AAPCS_VFP_Custom_f16()
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/ARM/ |
H A D | ARMCallingConv.cpp | 155 static const MCPhysReg SRegList[] = { ARM::S0, ARM::S1, ARM::S2, ARM::S3, variable 214 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 262 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 313 SRegList); in CC_ARM_AAPCS_VFP_Custom_f16()
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMCallingConv.cpp | 155 static const MCPhysReg SRegList[] = { ARM::S0, ARM::S1, ARM::S2, ARM::S3, variable 214 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 262 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 313 SRegList); in CC_ARM_AAPCS_VFP_Custom_f16()
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMCallingConv.cpp | 155 static const MCPhysReg SRegList[] = { ARM::S0, ARM::S1, ARM::S2, ARM::S3, variable 214 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 260 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 309 SRegList); in CC_ARM_AAPCS_VFP_Custom_f16()
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMCallingConv.cpp | 155 static const MCPhysReg SRegList[] = { ARM::S0, ARM::S1, ARM::S2, ARM::S3, variable 214 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 262 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 313 SRegList); in CC_ARM_AAPCS_VFP_Custom_f16()
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/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AArch64/ |
H A D | AArch64CallingConvention.cpp | 29 static const MCPhysReg SRegList[] = {AArch64::S0, AArch64::S1, AArch64::S2, variable 90 RegList = SRegList; in CC_AArch64_Custom_Block()
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/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/ARM/ |
H A D | ARMCallingConv.cpp | 158 static const MCPhysReg SRegList[] = { ARM::S0, ARM::S1, ARM::S2, ARM::S3, variable 215 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 259 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
H A D | ARMCallingConv.cpp | 158 static const MCPhysReg SRegList[] = { ARM::S0, ARM::S1, ARM::S2, ARM::S3, variable 215 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 259 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMCallingConv.cpp | 158 static const MCPhysReg SRegList[] = { ARM::S0, ARM::S1, ARM::S2, ARM::S3, variable 215 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 259 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
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/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/ARM/ |
H A D | ARMCallingConv.cpp | 158 static const MCPhysReg SRegList[] = { ARM::S0, ARM::S1, ARM::S2, ARM::S3, variable 215 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 259 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
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/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/ARM/ |
H A D | ARMCallingConv.h | 165 static const MCPhysReg SRegList[] = { ARM::S0, ARM::S1, ARM::S2, ARM::S3, variable 222 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 266 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
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/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/ARM/ |
H A D | ARMCallingConv.h | 165 static const MCPhysReg SRegList[] = { ARM::S0, ARM::S1, ARM::S2, ARM::S3, variable 222 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate() 266 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
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/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AArch64/ |
H A D | AArch64CallingConvention.h | 34 static const MCPhysReg SRegList[] = {AArch64::S0, AArch64::S1, AArch64::S2, variable 95 RegList = SRegList; in CC_AArch64_Custom_Block()
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/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AArch64/ |
H A D | AArch64CallingConvention.h | 34 static const MCPhysReg SRegList[] = {AArch64::S0, AArch64::S1, AArch64::S2, variable 95 RegList = SRegList; in CC_AArch64_Custom_Block()
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AArch64/ |
H A D | AArch64CallingConvention.cpp | 29 static const MCPhysReg SRegList[] = {AArch64::S0, AArch64::S1, AArch64::S2, variable 95 RegList = SRegList; in CC_AArch64_Custom_Block()
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/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AArch64/ |
H A D | AArch64CallingConvention.cpp | 29 static const MCPhysReg SRegList[] = {AArch64::S0, AArch64::S1, AArch64::S2, variable 96 RegList = SRegList; in CC_AArch64_Custom_Block()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
H A D | AArch64CallingConvention.cpp | 29 static const MCPhysReg SRegList[] = {AArch64::S0, AArch64::S1, AArch64::S2, variable 96 RegList = SRegList; in CC_AArch64_Custom_Block()
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64CallingConvention.cpp | 29 static const MCPhysReg SRegList[] = {AArch64::S0, AArch64::S1, AArch64::S2, variable 96 RegList = SRegList; in CC_AArch64_Custom_Block()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/ |
H A D | AArch64CallingConvention.cpp | 29 static const MCPhysReg SRegList[] = {AArch64::S0, AArch64::S1, AArch64::S2, variable 98 RegList = SRegList; in CC_AArch64_Custom_Block()
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