| /dports/devel/intel-graphics-compiler/intel-graphics-compiler-igc-1.0.9636/IGC/Compiler/Optimizer/ |
| H A D | IntDivRemCombine.cpp | 97 case Instruction::SRem: in runOnFunction()
141 Instruction::SRem : Instruction::URem; in replaceAllRemsInBlock()
180 auto targetOp = R->getOpcode() == Instruction::SRem ? in hoistMatchingDivAbove()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Transforms/Utils/ |
| H A D | IntegerDivision.cpp | 65 Value *SRem = Builder.CreateSub(Xored, DividendSign); in generateSignedRemainderCode() local
70 return SRem; in generateSignedRemainderCode()
376 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainder()
388 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainder()
486 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo32Bits()
511 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo32Bits()
535 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo64Bits()
559 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo64Bits()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | IntegerDivision.cpp | 65 Value *SRem = Builder.CreateSub(Xored, DividendSign); in generateSignedRemainderCode() local
70 return SRem; in generateSignedRemainderCode()
376 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainder()
388 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainder()
486 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo32Bits()
511 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo32Bits()
535 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo64Bits()
559 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo64Bits()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Transforms/Utils/ |
| H A D | IntegerDivision.cpp | 65 Value *SRem = Builder.CreateSub(Xored, DividendSign); in generateSignedRemainderCode() local
70 return SRem; in generateSignedRemainderCode()
376 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainder()
388 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainder()
486 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo32Bits()
511 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo32Bits()
535 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo64Bits()
559 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo64Bits()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Transforms/Utils/ |
| H A D | IntegerDivision.cpp | 65 Value *SRem = Builder.CreateSub(Xored, DividendSign); in generateSignedRemainderCode() local
70 return SRem; in generateSignedRemainderCode()
376 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainder()
388 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainder()
486 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo32Bits()
511 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo32Bits()
535 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo64Bits()
559 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo64Bits()
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Transforms/Utils/ |
| H A D | IntegerDivision.cpp | 65 Value *SRem = Builder.CreateSub(Xored, DividendSign); in generateSignedRemainderCode() local
70 return SRem; in generateSignedRemainderCode()
376 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainder()
388 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainder()
486 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo32Bits()
511 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo32Bits()
535 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo64Bits()
559 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo64Bits()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Transforms/Utils/ |
| H A D | IntegerDivision.cpp | 65 Value *SRem = Builder.CreateSub(Xored, DividendSign); in generateSignedRemainderCode() local
70 return SRem; in generateSignedRemainderCode()
376 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainder()
388 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainder()
486 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo32Bits()
511 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo32Bits()
535 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo64Bits()
559 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo64Bits()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Transforms/Utils/ |
| H A D | IntegerDivision.cpp | 65 Value *SRem = Builder.CreateSub(Xored, DividendSign); in generateSignedRemainderCode() local
70 return SRem; in generateSignedRemainderCode()
376 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainder()
388 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainder()
486 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo32Bits()
511 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo32Bits()
535 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo64Bits()
559 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo64Bits()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Transforms/Utils/ |
| H A D | IntegerDivision.cpp | 65 Value *SRem = Builder.CreateSub(Xored, DividendSign); in generateSignedRemainderCode() local
70 return SRem; in generateSignedRemainderCode()
376 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainder()
388 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainder()
486 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo32Bits()
511 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo32Bits()
535 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo64Bits()
559 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo64Bits()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | IntegerDivision.cpp | 65 Value *SRem = Builder.CreateSub(Xored, DividendSign); in generateSignedRemainderCode() local
70 return SRem; in generateSignedRemainderCode()
376 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainder()
388 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainder()
486 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo32Bits()
511 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo32Bits()
535 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo64Bits()
559 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo64Bits()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Utils/ |
| H A D | IntegerDivision.cpp | 65 Value *SRem = Builder.CreateSub(Xored, DividendSign); in generateSignedRemainderCode() local
70 return SRem; in generateSignedRemainderCode()
376 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainder()
388 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainder()
486 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo32Bits()
511 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo32Bits()
535 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo64Bits()
559 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo64Bits()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Transforms/Utils/ |
| H A D | IntegerDivision.cpp | 65 Value *SRem = Builder.CreateSub(Xored, DividendSign); in generateSignedRemainderCode() local
70 return SRem; in generateSignedRemainderCode()
376 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainder()
388 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainder()
486 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo32Bits()
511 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo32Bits()
535 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo64Bits()
559 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo64Bits()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Transforms/Utils/ |
| H A D | IntegerDivision.cpp | 65 Value *SRem = Builder.CreateSub(Xored, DividendSign); in generateSignedRemainderCode() local
70 return SRem; in generateSignedRemainderCode()
376 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainder()
388 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainder()
486 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo32Bits()
511 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo32Bits()
535 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo64Bits()
559 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo64Bits()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Transforms/Utils/ |
| H A D | IntegerDivision.cpp | 65 Value *SRem = Builder.CreateSub(Xored, DividendSign); in generateSignedRemainderCode() local
70 return SRem; in generateSignedRemainderCode()
376 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainder()
388 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainder()
486 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo32Bits()
511 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo32Bits()
535 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo64Bits()
559 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo64Bits()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Transforms/Utils/ |
| H A D | IntegerDivision.cpp | 65 Value *SRem = Builder.CreateSub(Xored, DividendSign); in generateSignedRemainderCode() local
70 return SRem; in generateSignedRemainderCode()
376 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainder()
388 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainder()
486 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo32Bits()
511 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo32Bits()
535 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo64Bits()
559 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo64Bits()
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Transforms/Utils/ |
| H A D | IntegerDivision.cpp | 65 Value *SRem = Builder.CreateSub(Xored, DividendSign); in generateSignedRemainderCode() local
70 return SRem; in generateSignedRemainderCode()
376 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainder()
388 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainder()
486 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo32Bits()
511 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo32Bits()
535 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo64Bits()
559 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo64Bits()
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Transforms/Utils/ |
| H A D | IntegerDivision.cpp | 66 Value *SRem = Builder.CreateSub(Xored, DividendSign); in generateSignedRemainderCode() local
71 return SRem; in generateSignedRemainderCode()
377 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainder()
389 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainder()
487 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo32Bits()
512 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo32Bits()
536 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo64Bits()
560 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo64Bits()
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Transforms/Utils/ |
| H A D | IntegerDivision.cpp | 66 Value *SRem = Builder.CreateSub(Xored, DividendSign);
71 return SRem;
377 assert((Rem->getOpcode() == Instruction::SRem ||
389 if (Rem->getOpcode() == Instruction::SRem) {
487 assert((Rem->getOpcode() == Instruction::SRem ||
512 if (Rem->getOpcode() == Instruction::SRem) {
536 assert((Rem->getOpcode() == Instruction::SRem ||
560 if (Rem->getOpcode() == Instruction::SRem) {
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/polly/lib/Support/ |
| H A D | SCEVValidator.cpp | 397 ValidatorResult visitSRemInstruction(Instruction *SRem, const SCEV *S) { in visitSRemInstruction()
398 assert(SRem->getOpcode() == Instruction::SRem && in visitSRemInstruction()
401 auto *Divisor = SRem->getOperand(1); in visitSRemInstruction()
404 return visitGenericInst(SRem, S); in visitSRemInstruction()
406 auto *Dividend = SRem->getOperand(0); in visitSRemInstruction()
432 case Instruction::SRem: in visitUnknown()
542 if (!Inst || (Inst->getOpcode() != Instruction::SRem && in follow()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/mlir/test/Dialect/SPIRV/ |
| H A D | arithmetic-ops.mlir | 178 // spv.SRem
182 // CHECK: spv.SRem
183 %0 = spv.SRem %arg, %arg : i32
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/mlir/test/Dialect/SPIRV/ |
| H A D | arithmetic-ops.mlir | 189 // spv.SRem
193 // CHECK: spv.SRem
194 %0 = spv.SRem %arg, %arg : i32
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/mlir/test/Dialect/SPIRV/IR/ |
| H A D | arithmetic-ops.mlir | 189 // spv.SRem
193 // CHECK: spv.SRem
194 %0 = spv.SRem %arg, %arg : i32
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/mlir/test/Dialect/SPIRV/IR/ |
| H A D | arithmetic-ops.mlir | 189 // spv.SRem
193 // CHECK: spv.SRem
194 %0 = spv.SRem %arg, %arg : i32
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/mlir/test/Dialect/SPIRV/IR/ |
| H A D | arithmetic-ops.mlir | 189 // spv.SRem
193 // CHECK: spv.SRem
194 %0 = spv.SRem %arg, %arg : i32
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/mlir/test/Dialect/SPIRV/ |
| H A D | arithmetic-ops.mlir | 189 // spv.SRem
193 // CHECK: spv.SRem
194 %0 = spv.SRem %arg, %arg : i32
|