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Searched refs:STEP_0_SPLL_FB_DIV_MASK (Results 1 – 8 of 8) sorted by relevance

/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/radeon/
H A Dr600_dpm.c496 STEP_0_SPLL_FB_DIV(divider), ~STEP_0_SPLL_FB_DIV_MASK); in r600_engine_clock_entry_set_feedback_divider()
H A Dr600d.h1366 # define STEP_0_SPLL_FB_DIV_MASK (0xff << 8) macro
/dports/misc/rump/buildrump.sh-b914579/src/sys/external/bsd/drm2/dist/drm/radeon/
H A Dr600_dpm.c492 STEP_0_SPLL_FB_DIV(divider), ~STEP_0_SPLL_FB_DIV_MASK); in r600_engine_clock_entry_set_feedback_divider()
H A Dr600d.h1334 # define STEP_0_SPLL_FB_DIV_MASK (0xff << 8) macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/radeon/
H A Dr600_dpm.c496 STEP_0_SPLL_FB_DIV(divider), ~STEP_0_SPLL_FB_DIV_MASK); in r600_engine_clock_entry_set_feedback_divider()
H A Dr600d.h1366 # define STEP_0_SPLL_FB_DIV_MASK (0xff << 8) macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/radeon/
H A Dr600_dpm.c496 STEP_0_SPLL_FB_DIV(divider), ~STEP_0_SPLL_FB_DIV_MASK); in r600_engine_clock_entry_set_feedback_divider()
H A Dr600d.h1366 # define STEP_0_SPLL_FB_DIV_MASK (0xff << 8) macro