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Searched refs:SYSTEM_PLL1_100M_CLK (Results 1 – 25 of 300) sorted by relevance

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/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-imx/imx8m/
H A Dclock_slice.c46 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
61 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
122 {OSC_25M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
133 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
138 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
508 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
523 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
592 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
597 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
962 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
[all …]
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/mach-imx/imx8m/
H A Dclock_slice.c46 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
61 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
122 {OSC_25M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
133 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
138 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
508 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
523 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
592 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
597 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
962 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
[all …]
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-imx/imx8m/
H A Dclock_slice.c46 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
61 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
122 {OSC_25M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
133 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
138 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
508 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
523 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
592 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
597 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
962 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
[all …]
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-imx/imx8m/
H A Dclock_slice.c46 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
61 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
122 {OSC_25M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
133 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
138 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
508 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
523 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
592 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
597 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
962 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
[all …]
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-imx/imx8m/
H A Dclock_slice.c46 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
61 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
122 {OSC_25M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
133 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
138 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
508 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
523 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
592 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
597 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
962 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
[all …]
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-imx/imx8m/
H A Dclock_slice.c46 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
61 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
122 {OSC_25M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
133 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
138 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
508 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
523 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
592 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
597 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
962 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
[all …]
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/mach-imx/imx8m/
H A Dclock_slice.c46 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
61 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
122 {OSC_25M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
133 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
138 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
508 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
523 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
592 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
597 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
962 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
[all …]
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-imx/imx8m/
H A Dclock_slice.c46 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
61 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
122 {OSC_25M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
133 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
138 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
508 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
523 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
592 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
597 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
962 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
[all …]
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/mach-imx/imx8m/
H A Dclock_slice.c46 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
61 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
122 {OSC_25M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
133 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
138 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
508 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
523 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
592 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
597 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
962 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
[all …]
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/mach-imx/imx8m/
H A Dclock_slice.c46 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
61 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
122 {OSC_25M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
133 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
138 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
508 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
523 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
592 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
597 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
962 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
[all …]
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/mach-imx/imx8m/
H A Dclock_slice.c46 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
61 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
122 {OSC_25M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
133 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
138 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
508 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
523 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
592 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
597 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
962 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
[all …]
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-imx/imx8m/
H A Dclock_slice.c46 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
61 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
122 {OSC_25M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
133 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
138 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
508 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
523 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
592 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
597 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
962 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
[all …]
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/mach-imx/imx8m/
H A Dclock_slice.c46 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
61 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
122 {OSC_25M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
133 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
138 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
508 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
523 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
592 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
597 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
962 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
[all …]
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-imx/imx8m/
H A Dclock_slice.c46 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
61 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
122 {OSC_25M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
133 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
138 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
508 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
523 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
592 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
597 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
962 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
[all …]
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-imx/imx8m/
H A Dclock_slice.c46 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
61 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
122 {OSC_25M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
133 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
138 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
508 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
523 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
592 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
597 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
962 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
[all …]
/dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/arm/mach-imx/imx8m/
H A Dclock_slice.c46 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
61 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
122 {OSC_25M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
133 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
138 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
508 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
523 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
592 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
597 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
962 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
[all …]
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/mach-imx/imx8m/
H A Dclock_slice.c46 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
61 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
122 {OSC_25M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
133 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
138 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
508 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
523 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
592 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
597 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
962 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
[all …]
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/mach-imx/imx8m/
H A Dclock_slice.c46 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
61 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
122 {OSC_25M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
133 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
138 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
508 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
523 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
592 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
597 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
962 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
[all …]
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/mach-imx/imx8m/
H A Dclock_slice.c46 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
61 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
122 {OSC_25M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
133 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
138 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
508 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
523 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
592 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
597 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
962 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
[all …]
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/mach-imx/imx8m/
H A Dclock_slice.c46 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
61 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
122 {OSC_25M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
133 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
138 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
508 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
523 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
592 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
597 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
962 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
[all …]
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/mach-imx/imx8m/
H A Dclock_slice.c46 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
61 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
122 {OSC_25M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
133 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
138 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
508 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
523 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
592 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
597 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
962 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
[all …]
/dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/arch/arm/mach-imx/imx8m/
H A Dclock_slice.c46 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
61 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
122 {OSC_25M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
133 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
138 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
508 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
523 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
592 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
597 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
962 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
[all …]
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/mach-imx/imx8m/
H A Dclock_slice.c46 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
61 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
122 {OSC_25M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
133 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
138 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
508 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
523 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
592 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
597 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
962 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
[all …]
/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/arch/arm/mach-imx/imx8m/
H A Dclock_slice.c46 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
61 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
122 {OSC_25M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
133 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
138 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
508 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
523 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
592 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
597 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
962 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
[all …]
/dports/sysutils/u-boot-pine64-lts/u-boot-2021.07/arch/arm/mach-imx/imx8m/
H A Dclock_slice.c46 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
61 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
122 {OSC_25M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
133 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
138 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
508 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
523 SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
592 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
597 SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
962 AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
[all …]

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