| /dports/devel/llvm80/llvm-8.0.1.src/lib/MC/ |
| H A D | MCSchedule.cpp | 58 unsigned SchedClass) const {
72 const MCSchedClassDesc *SCDesc = getSchedClassDesc(SchedClass);
78 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, CPUID);
79 SCDesc = getSchedClassDesc(SchedClass);
82 if (SchedClass)
124 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, CPUID);
125 SCDesc = getSchedClassDesc(SchedClass);
128 if (SchedClass)
135 MCSchedModel::getReciprocalThroughput(unsigned SchedClass,
138 const InstrStage *I = IID.beginStage(SchedClass);
[all …]
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/MC/ |
| H A D | MCSchedule.cpp | 58 unsigned SchedClass) const { in computeInstrLatency()
72 const MCSchedClassDesc *SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
78 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, CPUID); in computeInstrLatency()
79 SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
82 if (SchedClass) in computeInstrLatency()
124 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, CPUID); in getReciprocalThroughput()
125 SCDesc = getSchedClassDesc(SchedClass); in getReciprocalThroughput()
128 if (SchedClass) in getReciprocalThroughput()
135 MCSchedModel::getReciprocalThroughput(unsigned SchedClass, in getReciprocalThroughput() argument
138 const InstrStage *I = IID.beginStage(SchedClass); in getReciprocalThroughput()
[all …]
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/MC/ |
| H A D | MCSchedule.cpp | 57 unsigned SchedClass) const { in computeInstrLatency()
71 const MCSchedClassDesc *SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
77 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in computeInstrLatency()
78 SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
81 if (SchedClass) in computeInstrLatency()
123 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in getReciprocalThroughput()
124 SCDesc = getSchedClassDesc(SchedClass); in getReciprocalThroughput()
127 if (SchedClass) in getReciprocalThroughput()
134 MCSchedModel::getReciprocalThroughput(unsigned SchedClass, in getReciprocalThroughput() argument
137 const InstrStage *I = IID.beginStage(SchedClass); in getReciprocalThroughput()
[all …]
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/MC/ |
| H A D | MCSchedule.cpp | 57 unsigned SchedClass) const { in computeInstrLatency()
71 const MCSchedClassDesc *SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
77 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, CPUID); in computeInstrLatency()
78 SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
81 if (SchedClass) in computeInstrLatency()
123 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, CPUID); in getReciprocalThroughput()
124 SCDesc = getSchedClassDesc(SchedClass); in getReciprocalThroughput()
127 if (SchedClass) in getReciprocalThroughput()
134 MCSchedModel::getReciprocalThroughput(unsigned SchedClass, in getReciprocalThroughput() argument
137 const InstrStage *I = IID.beginStage(SchedClass); in getReciprocalThroughput()
[all …]
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/MC/ |
| H A D | MCSchedule.cpp | 57 unsigned SchedClass) const { in computeInstrLatency()
71 const MCSchedClassDesc *SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
77 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in computeInstrLatency()
78 SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
81 if (SchedClass) in computeInstrLatency()
123 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in getReciprocalThroughput()
124 SCDesc = getSchedClassDesc(SchedClass); in getReciprocalThroughput()
127 if (SchedClass) in getReciprocalThroughput()
134 MCSchedModel::getReciprocalThroughput(unsigned SchedClass, in getReciprocalThroughput() argument
137 const InstrStage *I = IID.beginStage(SchedClass); in getReciprocalThroughput()
[all …]
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/MC/ |
| H A D | MCSchedule.cpp | 57 unsigned SchedClass) const { in computeInstrLatency()
71 const MCSchedClassDesc *SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
77 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in computeInstrLatency()
78 SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
81 if (SchedClass) in computeInstrLatency()
123 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in getReciprocalThroughput()
124 SCDesc = getSchedClassDesc(SchedClass); in getReciprocalThroughput()
127 if (SchedClass) in getReciprocalThroughput()
134 MCSchedModel::getReciprocalThroughput(unsigned SchedClass, in getReciprocalThroughput() argument
137 const InstrStage *I = IID.beginStage(SchedClass); in getReciprocalThroughput()
[all …]
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/MC/ |
| H A D | MCSchedule.cpp | 57 unsigned SchedClass) const { in computeInstrLatency()
71 const MCSchedClassDesc *SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
77 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in computeInstrLatency()
78 SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
81 if (SchedClass) in computeInstrLatency()
123 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in getReciprocalThroughput()
124 SCDesc = getSchedClassDesc(SchedClass); in getReciprocalThroughput()
127 if (SchedClass) in getReciprocalThroughput()
134 MCSchedModel::getReciprocalThroughput(unsigned SchedClass, in getReciprocalThroughput() argument
137 const InstrStage *I = IID.beginStage(SchedClass); in getReciprocalThroughput()
[all …]
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/MC/ |
| H A D | MCSchedule.cpp | 57 unsigned SchedClass) const { in computeInstrLatency()
71 const MCSchedClassDesc *SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
77 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, CPUID); in computeInstrLatency()
78 SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
81 if (SchedClass) in computeInstrLatency()
123 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, CPUID); in getReciprocalThroughput()
124 SCDesc = getSchedClassDesc(SchedClass); in getReciprocalThroughput()
127 if (SchedClass) in getReciprocalThroughput()
134 MCSchedModel::getReciprocalThroughput(unsigned SchedClass, in getReciprocalThroughput() argument
137 const InstrStage *I = IID.beginStage(SchedClass); in getReciprocalThroughput()
[all …]
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/MC/ |
| H A D | MCSchedule.cpp | 57 unsigned SchedClass) const { in computeInstrLatency()
71 const MCSchedClassDesc *SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
77 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, CPUID); in computeInstrLatency()
78 SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
81 if (SchedClass) in computeInstrLatency()
123 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, CPUID); in getReciprocalThroughput()
124 SCDesc = getSchedClassDesc(SchedClass); in getReciprocalThroughput()
127 if (SchedClass) in getReciprocalThroughput()
134 MCSchedModel::getReciprocalThroughput(unsigned SchedClass, in getReciprocalThroughput() argument
137 const InstrStage *I = IID.beginStage(SchedClass); in getReciprocalThroughput()
[all …]
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/MC/ |
| H A D | MCSchedule.cpp | 57 unsigned SchedClass) const { in computeInstrLatency()
71 const MCSchedClassDesc *SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
77 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in computeInstrLatency()
78 SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
81 if (SchedClass) in computeInstrLatency()
123 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in getReciprocalThroughput()
124 SCDesc = getSchedClassDesc(SchedClass); in getReciprocalThroughput()
127 if (SchedClass) in getReciprocalThroughput()
134 MCSchedModel::getReciprocalThroughput(unsigned SchedClass, in getReciprocalThroughput() argument
137 const InstrStage *I = IID.beginStage(SchedClass); in getReciprocalThroughput()
[all …]
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/MC/ |
| H A D | MCSchedule.cpp | 57 unsigned SchedClass) const { in computeInstrLatency()
71 const MCSchedClassDesc *SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
77 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, CPUID); in computeInstrLatency()
78 SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
81 if (SchedClass) in computeInstrLatency()
123 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, CPUID); in getReciprocalThroughput()
124 SCDesc = getSchedClassDesc(SchedClass); in getReciprocalThroughput()
127 if (SchedClass) in getReciprocalThroughput()
134 MCSchedModel::getReciprocalThroughput(unsigned SchedClass, in getReciprocalThroughput() argument
137 const InstrStage *I = IID.beginStage(SchedClass); in getReciprocalThroughput()
[all …]
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/MC/ |
| H A D | MCSchedule.cpp | 57 unsigned SchedClass) const { in computeInstrLatency()
71 const MCSchedClassDesc *SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
77 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in computeInstrLatency()
78 SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
81 if (SchedClass) in computeInstrLatency()
123 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in getReciprocalThroughput()
124 SCDesc = getSchedClassDesc(SchedClass); in getReciprocalThroughput()
127 if (SchedClass) in getReciprocalThroughput()
134 MCSchedModel::getReciprocalThroughput(unsigned SchedClass, in getReciprocalThroughput() argument
137 const InstrStage *I = IID.beginStage(SchedClass); in getReciprocalThroughput()
[all …]
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/MC/ |
| H A D | MCSchedule.cpp | 57 unsigned SchedClass) const { in computeInstrLatency()
71 const MCSchedClassDesc *SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
77 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in computeInstrLatency()
78 SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
81 if (SchedClass) in computeInstrLatency()
123 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in getReciprocalThroughput()
124 SCDesc = getSchedClassDesc(SchedClass); in getReciprocalThroughput()
127 if (SchedClass) in getReciprocalThroughput()
134 MCSchedModel::getReciprocalThroughput(unsigned SchedClass, in getReciprocalThroughput() argument
137 const InstrStage *I = IID.beginStage(SchedClass); in getReciprocalThroughput()
[all …]
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/MC/ |
| H A D | MCSchedule.cpp | 57 unsigned SchedClass) const { in computeInstrLatency()
71 const MCSchedClassDesc *SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
77 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, CPUID); in computeInstrLatency()
78 SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
81 if (SchedClass) in computeInstrLatency()
123 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, CPUID); in getReciprocalThroughput()
124 SCDesc = getSchedClassDesc(SchedClass); in getReciprocalThroughput()
127 if (SchedClass) in getReciprocalThroughput()
134 MCSchedModel::getReciprocalThroughput(unsigned SchedClass, in getReciprocalThroughput() argument
137 const InstrStage *I = IID.beginStage(SchedClass); in getReciprocalThroughput()
[all …]
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/MC/ |
| H A D | MCSchedule.cpp | 57 unsigned SchedClass) const { in computeInstrLatency()
71 const MCSchedClassDesc *SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
77 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in computeInstrLatency()
78 SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
81 if (SchedClass) in computeInstrLatency()
123 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in getReciprocalThroughput()
124 SCDesc = getSchedClassDesc(SchedClass); in getReciprocalThroughput()
127 if (SchedClass) in getReciprocalThroughput()
134 MCSchedModel::getReciprocalThroughput(unsigned SchedClass, in getReciprocalThroughput() argument
137 const InstrStage *I = IID.beginStage(SchedClass); in getReciprocalThroughput()
[all …]
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/MC/ |
| H A D | MCSchedule.cpp | 57 unsigned SchedClass) const { in computeInstrLatency()
71 const MCSchedClassDesc *SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
77 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in computeInstrLatency()
78 SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
81 if (SchedClass) in computeInstrLatency()
123 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in getReciprocalThroughput()
124 SCDesc = getSchedClassDesc(SchedClass); in getReciprocalThroughput()
127 if (SchedClass) in getReciprocalThroughput()
134 MCSchedModel::getReciprocalThroughput(unsigned SchedClass, in getReciprocalThroughput() argument
137 const InstrStage *I = IID.beginStage(SchedClass); in getReciprocalThroughput()
[all …]
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/MC/ |
| H A D | MCSchedule.cpp | 57 unsigned SchedClass) const { in computeInstrLatency()
71 const MCSchedClassDesc *SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
77 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, CPUID); in computeInstrLatency()
78 SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
81 if (SchedClass) in computeInstrLatency()
123 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, CPUID); in getReciprocalThroughput()
124 SCDesc = getSchedClassDesc(SchedClass); in getReciprocalThroughput()
127 if (SchedClass) in getReciprocalThroughput()
134 MCSchedModel::getReciprocalThroughput(unsigned SchedClass, in getReciprocalThroughput() argument
137 const InstrStage *I = IID.beginStage(SchedClass); in getReciprocalThroughput()
[all …]
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/Hexagon/ |
| H A D | HexagonDepTimingClasses.h | 21 inline bool is_TC3x(unsigned SchedClass) { in is_TC3x() argument
22 switch (SchedClass) { in is_TC3x()
42 inline bool is_TC2early(unsigned SchedClass) { in is_TC2early() argument
43 switch (SchedClass) { in is_TC2early()
52 inline bool is_TC4x(unsigned SchedClass) { in is_TC4x() argument
53 switch (SchedClass) { in is_TC4x()
66 inline bool is_TC2(unsigned SchedClass) { in is_TC2() argument
67 switch (SchedClass) { in is_TC2()
91 inline bool is_TC1(unsigned SchedClass) { in is_TC1() argument
92 switch (SchedClass) { in is_TC1()
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/Hexagon/ |
| H A D | HexagonDepTimingClasses.h | 19 inline bool is_TC3x(unsigned SchedClass) { in is_TC3x() argument
20 switch (SchedClass) { in is_TC3x()
46 inline bool is_TC2early(unsigned SchedClass) { in is_TC2early() argument
47 switch (SchedClass) { in is_TC2early()
56 inline bool is_TC4x(unsigned SchedClass) { in is_TC4x() argument
57 switch (SchedClass) { in is_TC4x()
71 inline bool is_TC2(unsigned SchedClass) { in is_TC2() argument
72 switch (SchedClass) { in is_TC2()
100 inline bool is_TC1(unsigned SchedClass) { in is_TC1() argument
101 switch (SchedClass) { in is_TC1()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| H A D | HexagonDepTimingClasses.h | 19 inline bool is_TC3x(unsigned SchedClass) { in is_TC3x() argument
20 switch (SchedClass) { in is_TC3x()
46 inline bool is_TC2early(unsigned SchedClass) { in is_TC2early() argument
47 switch (SchedClass) { in is_TC2early()
56 inline bool is_TC4x(unsigned SchedClass) { in is_TC4x() argument
57 switch (SchedClass) { in is_TC4x()
71 inline bool is_TC2(unsigned SchedClass) { in is_TC2() argument
72 switch (SchedClass) { in is_TC2()
100 inline bool is_TC1(unsigned SchedClass) { in is_TC1() argument
101 switch (SchedClass) { in is_TC1()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonDepTimingClasses.h | 19 inline bool is_TC3x(unsigned SchedClass) { in is_TC3x() argument
20 switch (SchedClass) { in is_TC3x()
46 inline bool is_TC2early(unsigned SchedClass) { in is_TC2early() argument
47 switch (SchedClass) { in is_TC2early()
56 inline bool is_TC4x(unsigned SchedClass) { in is_TC4x() argument
57 switch (SchedClass) { in is_TC4x()
71 inline bool is_TC2(unsigned SchedClass) { in is_TC2() argument
72 switch (SchedClass) { in is_TC2()
100 inline bool is_TC1(unsigned SchedClass) { in is_TC1() argument
101 switch (SchedClass) { in is_TC1()
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/Hexagon/ |
| H A D | HexagonDepTimingClasses.h | 19 inline bool is_TC3x(unsigned SchedClass) { in is_TC3x() argument
20 switch (SchedClass) { in is_TC3x()
46 inline bool is_TC2early(unsigned SchedClass) { in is_TC2early() argument
47 switch (SchedClass) { in is_TC2early()
56 inline bool is_TC4x(unsigned SchedClass) { in is_TC4x() argument
57 switch (SchedClass) { in is_TC4x()
71 inline bool is_TC2(unsigned SchedClass) { in is_TC2() argument
72 switch (SchedClass) { in is_TC2()
100 inline bool is_TC1(unsigned SchedClass) { in is_TC1() argument
101 switch (SchedClass) { in is_TC1()
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/Hexagon/ |
| H A D | HexagonDepTimingClasses.h | 20 inline bool is_TC3x(unsigned SchedClass) { in is_TC3x() argument
21 switch (SchedClass) { in is_TC3x()
47 inline bool is_TC2early(unsigned SchedClass) { in is_TC2early() argument
48 switch (SchedClass) { in is_TC2early()
57 inline bool is_TC4x(unsigned SchedClass) { in is_TC4x() argument
58 switch (SchedClass) { in is_TC4x()
72 inline bool is_TC2(unsigned SchedClass) { in is_TC2() argument
73 switch (SchedClass) { in is_TC2()
101 inline bool is_TC1(unsigned SchedClass) { in is_TC1() argument
102 switch (SchedClass) { in is_TC1()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonDepTimingClasses.h | 19 inline bool is_TC1(unsigned SchedClass) { in is_TC1() argument
20 switch (SchedClass) { in is_TC1()
66 inline bool is_TC2(unsigned SchedClass) { in is_TC2() argument
67 switch (SchedClass) { in is_TC2()
98 inline bool is_TC3x(unsigned SchedClass) { in is_TC3x() argument
99 switch (SchedClass) { in is_TC3x()
129 inline bool is_TC2early(unsigned SchedClass) { in is_TC2early() argument
130 switch (SchedClass) { in is_TC2early()
139 inline bool is_TC4x(unsigned SchedClass) { in is_TC4x() argument
140 switch (SchedClass) { in is_TC4x()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/Hexagon/ |
| H A D | HexagonDepTimingClasses.h | 19 inline bool is_TC1(unsigned SchedClass) { in is_TC1() argument
20 switch (SchedClass) { in is_TC1()
66 inline bool is_TC2(unsigned SchedClass) { in is_TC2() argument
67 switch (SchedClass) { in is_TC2()
98 inline bool is_TC3x(unsigned SchedClass) { in is_TC3x() argument
99 switch (SchedClass) { in is_TC3x()
129 inline bool is_TC2early(unsigned SchedClass) { in is_TC2early() argument
130 switch (SchedClass) { in is_TC2early()
139 inline bool is_TC4x(unsigned SchedClass) { in is_TC4x() argument
140 switch (SchedClass) { in is_TC4x()
|