/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AMDGPU/ |
H A D | SIMachineScheduler.cpp | 300 ScheduledSUnits.push_back(SU); in fastSchedule() 337 for (SUnit* SU : ScheduledSUnits) { in initRegPressure() 418 ScheduledSUnits.push_back(SU); in schedule() 449 ScheduledSUnits.clear(); in undoSchedule() 1827 SUnit *SU = &SUnits[ScheduledSUnits[i]]; in moveLowLatencies() 1852 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1854 ScheduledSUnits[BestPos] = SU->NodeNum; in moveLowLatencies() 1879 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1881 ScheduledSUnits[MinPos] = SU->NodeNum; in moveLowLatencies() 2009 ScheduledSUnits = Best.SUs; in schedule() [all …]
|
H A D | SIMachineScheduler.h | 68 std::vector<SUnit*> ScheduledSUnits; variable 145 std::vector<SUnit*> getScheduledUnits() { return ScheduledSUnits; } in getScheduledUnits() 435 std::vector<unsigned> ScheduledSUnits; variable
|
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AMDGPU/ |
H A D | SIMachineScheduler.cpp | 300 ScheduledSUnits.push_back(SU); in fastSchedule() 337 for (SUnit* SU : ScheduledSUnits) { in initRegPressure() 418 ScheduledSUnits.push_back(SU); in schedule() 449 ScheduledSUnits.clear(); in undoSchedule() 1827 SUnit *SU = &SUnits[ScheduledSUnits[i]]; in moveLowLatencies() 1852 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1854 ScheduledSUnits[BestPos] = SU->NodeNum; in moveLowLatencies() 1879 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1881 ScheduledSUnits[MinPos] = SU->NodeNum; in moveLowLatencies() 2009 ScheduledSUnits = Best.SUs; in schedule() [all …]
|
H A D | SIMachineScheduler.h | 68 std::vector<SUnit*> ScheduledSUnits; variable 145 std::vector<SUnit*> getScheduledUnits() { return ScheduledSUnits; } in getScheduledUnits() 435 std::vector<unsigned> ScheduledSUnits; variable
|
/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AMDGPU/ |
H A D | SIMachineScheduler.cpp | 300 ScheduledSUnits.push_back(SU); in fastSchedule() 337 for (SUnit* SU : ScheduledSUnits) { in initRegPressure() 418 ScheduledSUnits.push_back(SU); in schedule() 449 ScheduledSUnits.clear(); in undoSchedule() 1828 SUnit *SU = &SUnits[ScheduledSUnits[i]]; in moveLowLatencies() 1853 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1855 ScheduledSUnits[BestPos] = SU->NodeNum; in moveLowLatencies() 1880 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1882 ScheduledSUnits[MinPos] = SU->NodeNum; in moveLowLatencies() 2009 ScheduledSUnits = Best.SUs; in schedule() [all …]
|
H A D | SIMachineScheduler.h | 68 std::vector<SUnit*> ScheduledSUnits; variable 145 std::vector<SUnit*> getScheduledUnits() { return ScheduledSUnits; } in getScheduledUnits() 435 std::vector<unsigned> ScheduledSUnits; variable
|
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | SIMachineScheduler.cpp | 281 ScheduledSUnits.push_back(SU); 318 for (SUnit* SU : ScheduledSUnits) { 399 ScheduledSUnits.push_back(SU); 430 ScheduledSUnits.clear(); 1807 SUnit *SU = &SUnits[ScheduledSUnits[i]]; 1832 ScheduledSUnits[u] = ScheduledSUnits[u-1]; 1834 ScheduledSUnits[BestPos] = SU->NodeNum; 1859 ScheduledSUnits[u] = ScheduledSUnits[u-1]; 1861 ScheduledSUnits[MinPos] = SU->NodeNum; 1989 ScheduledSUnits = Best.SUs; [all …]
|
H A D | SIMachineScheduler.h | 66 std::vector<SUnit*> ScheduledSUnits; 143 std::vector<SUnit*> getScheduledUnits() { return ScheduledSUnits; } 433 std::vector<unsigned> ScheduledSUnits;
|
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AMDGPU/ |
H A D | SIMachineScheduler.cpp | 281 ScheduledSUnits.push_back(SU); in fastSchedule() 318 for (SUnit* SU : ScheduledSUnits) { in initRegPressure() 399 ScheduledSUnits.push_back(SU); in schedule() 430 ScheduledSUnits.clear(); in undoSchedule() 1807 SUnit *SU = &SUnits[ScheduledSUnits[i]]; in moveLowLatencies() 1832 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1834 ScheduledSUnits[BestPos] = SU->NodeNum; in moveLowLatencies() 1859 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1861 ScheduledSUnits[MinPos] = SU->NodeNum; in moveLowLatencies() 1989 ScheduledSUnits = Best.SUs; in schedule() [all …]
|
H A D | SIMachineScheduler.h | 66 std::vector<SUnit*> ScheduledSUnits; variable 143 std::vector<SUnit*> getScheduledUnits() { return ScheduledSUnits; } in getScheduledUnits() 433 std::vector<unsigned> ScheduledSUnits; variable
|
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | SIMachineScheduler.cpp | 281 ScheduledSUnits.push_back(SU); in fastSchedule() 318 for (SUnit* SU : ScheduledSUnits) { in initRegPressure() 399 ScheduledSUnits.push_back(SU); in schedule() 430 ScheduledSUnits.clear(); in undoSchedule() 1807 SUnit *SU = &SUnits[ScheduledSUnits[i]]; in moveLowLatencies() 1832 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1834 ScheduledSUnits[BestPos] = SU->NodeNum; in moveLowLatencies() 1859 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1861 ScheduledSUnits[MinPos] = SU->NodeNum; in moveLowLatencies() 1989 ScheduledSUnits = Best.SUs; in schedule() [all …]
|
H A D | SIMachineScheduler.h | 66 std::vector<SUnit*> ScheduledSUnits; variable 143 std::vector<SUnit*> getScheduledUnits() { return ScheduledSUnits; } in getScheduledUnits() 433 std::vector<unsigned> ScheduledSUnits; variable
|
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AMDGPU/ |
H A D | SIMachineScheduler.cpp | 300 ScheduledSUnits.push_back(SU); in fastSchedule() 337 for (SUnit* SU : ScheduledSUnits) { in initRegPressure() 418 ScheduledSUnits.push_back(SU); in schedule() 449 ScheduledSUnits.clear(); in undoSchedule() 1827 SUnit *SU = &SUnits[ScheduledSUnits[i]]; in moveLowLatencies() 1852 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1854 ScheduledSUnits[BestPos] = SU->NodeNum; in moveLowLatencies() 1879 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1881 ScheduledSUnits[MinPos] = SU->NodeNum; in moveLowLatencies() 2009 ScheduledSUnits = Best.SUs; in schedule() [all …]
|
H A D | SIMachineScheduler.h | 68 std::vector<SUnit*> ScheduledSUnits; variable 145 std::vector<SUnit*> getScheduledUnits() { return ScheduledSUnits; } in getScheduledUnits() 435 std::vector<unsigned> ScheduledSUnits; variable
|
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
H A D | SIMachineScheduler.cpp | 300 ScheduledSUnits.push_back(SU); in fastSchedule() 337 for (SUnit* SU : ScheduledSUnits) { in initRegPressure() 418 ScheduledSUnits.push_back(SU); in schedule() 449 ScheduledSUnits.clear(); in undoSchedule() 1828 SUnit *SU = &SUnits[ScheduledSUnits[i]]; in moveLowLatencies() 1853 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1855 ScheduledSUnits[BestPos] = SU->NodeNum; in moveLowLatencies() 1880 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1882 ScheduledSUnits[MinPos] = SU->NodeNum; in moveLowLatencies() 2009 ScheduledSUnits = Best.SUs; in schedule() [all …]
|
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIMachineScheduler.cpp | 281 ScheduledSUnits.push_back(SU); in fastSchedule() 318 for (SUnit* SU : ScheduledSUnits) { in initRegPressure() 399 ScheduledSUnits.push_back(SU); in schedule() 430 ScheduledSUnits.clear(); in undoSchedule() 1807 SUnit *SU = &SUnits[ScheduledSUnits[i]]; in moveLowLatencies() 1832 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1834 ScheduledSUnits[BestPos] = SU->NodeNum; in moveLowLatencies() 1859 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1861 ScheduledSUnits[MinPos] = SU->NodeNum; in moveLowLatencies() 1989 ScheduledSUnits = Best.SUs; in schedule() [all …]
|
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AMDGPU/ |
H A D | SIMachineScheduler.cpp | 281 ScheduledSUnits.push_back(SU); in fastSchedule() 318 for (SUnit* SU : ScheduledSUnits) { in initRegPressure() 399 ScheduledSUnits.push_back(SU); in schedule() 430 ScheduledSUnits.clear(); in undoSchedule() 1807 SUnit *SU = &SUnits[ScheduledSUnits[i]]; in moveLowLatencies() 1832 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1834 ScheduledSUnits[BestPos] = SU->NodeNum; in moveLowLatencies() 1859 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1861 ScheduledSUnits[MinPos] = SU->NodeNum; in moveLowLatencies() 1989 ScheduledSUnits = Best.SUs; in schedule() [all …]
|
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | SIMachineScheduler.cpp | 281 ScheduledSUnits.push_back(SU); in fastSchedule() 318 for (SUnit* SU : ScheduledSUnits) { in initRegPressure() 399 ScheduledSUnits.push_back(SU); in schedule() 430 ScheduledSUnits.clear(); in undoSchedule() 1807 SUnit *SU = &SUnits[ScheduledSUnits[i]]; in moveLowLatencies() 1832 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1834 ScheduledSUnits[BestPos] = SU->NodeNum; in moveLowLatencies() 1859 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1861 ScheduledSUnits[MinPos] = SU->NodeNum; in moveLowLatencies() 1989 ScheduledSUnits = Best.SUs; in schedule() [all …]
|
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIMachineScheduler.cpp | 300 ScheduledSUnits.push_back(SU); in fastSchedule() 337 for (SUnit* SU : ScheduledSUnits) { in initRegPressure() 418 ScheduledSUnits.push_back(SU); in schedule() 449 ScheduledSUnits.clear(); in undoSchedule() 1828 SUnit *SU = &SUnits[ScheduledSUnits[i]]; in moveLowLatencies() 1853 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1855 ScheduledSUnits[BestPos] = SU->NodeNum; in moveLowLatencies() 1880 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1882 ScheduledSUnits[MinPos] = SU->NodeNum; in moveLowLatencies() 2009 ScheduledSUnits = Best.SUs; in schedule() [all …]
|
H A D | SIMachineScheduler.h | 68 std::vector<SUnit*> ScheduledSUnits; variable 145 std::vector<SUnit*> getScheduledUnits() { return ScheduledSUnits; } in getScheduledUnits() 435 std::vector<unsigned> ScheduledSUnits; variable
|
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | SIMachineScheduler.cpp | 281 ScheduledSUnits.push_back(SU); in fastSchedule() 318 for (SUnit* SU : ScheduledSUnits) { in initRegPressure() 399 ScheduledSUnits.push_back(SU); in schedule() 430 ScheduledSUnits.clear(); in undoSchedule() 1807 SUnit *SU = &SUnits[ScheduledSUnits[i]]; in moveLowLatencies() 1832 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1834 ScheduledSUnits[BestPos] = SU->NodeNum; in moveLowLatencies() 1859 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1861 ScheduledSUnits[MinPos] = SU->NodeNum; in moveLowLatencies() 1989 ScheduledSUnits = Best.SUs; in schedule() [all …]
|
/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AMDGPU/ |
H A D | SIMachineScheduler.cpp | 300 ScheduledSUnits.push_back(SU); in fastSchedule() 337 for (SUnit* SU : ScheduledSUnits) { in initRegPressure() 418 ScheduledSUnits.push_back(SU); in schedule() 449 ScheduledSUnits.clear(); in undoSchedule() 1836 SUnit *SU = &SUnits[ScheduledSUnits[i]]; in moveLowLatencies() 1861 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1863 ScheduledSUnits[BestPos] = SU->NodeNum; in moveLowLatencies() 1888 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1890 ScheduledSUnits[MinPos] = SU->NodeNum; in moveLowLatencies() 2017 ScheduledSUnits = Best.SUs; in schedule() [all …]
|
/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AMDGPU/ |
H A D | SIMachineScheduler.cpp | 301 ScheduledSUnits.push_back(SU); in fastSchedule() 338 for (SUnit* SU : ScheduledSUnits) { in initRegPressure() 419 ScheduledSUnits.push_back(SU); in schedule() 450 ScheduledSUnits.clear(); in undoSchedule() 1837 SUnit *SU = &SUnits[ScheduledSUnits[i]]; in moveLowLatencies() 1862 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1864 ScheduledSUnits[BestPos] = SU->NodeNum; in moveLowLatencies() 1887 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1889 ScheduledSUnits[MinPos] = SU->NodeNum; in moveLowLatencies() 2016 ScheduledSUnits = Best.SUs; in schedule() [all …]
|
/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AMDGPU/ |
H A D | SIMachineScheduler.cpp | 301 ScheduledSUnits.push_back(SU); in fastSchedule() 338 for (SUnit* SU : ScheduledSUnits) { in initRegPressure() 419 ScheduledSUnits.push_back(SU); in schedule() 450 ScheduledSUnits.clear(); in undoSchedule() 1839 SUnit *SU = &SUnits[ScheduledSUnits[i]]; in moveLowLatencies() 1864 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1866 ScheduledSUnits[BestPos] = SU->NodeNum; in moveLowLatencies() 1889 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1891 ScheduledSUnits[MinPos] = SU->NodeNum; in moveLowLatencies() 2018 ScheduledSUnits = Best.SUs; in schedule() [all …]
|
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | SIMachineScheduler.cpp | 281 ScheduledSUnits.push_back(SU); in fastSchedule() 318 for (SUnit* SU : ScheduledSUnits) { in initRegPressure() 399 ScheduledSUnits.push_back(SU); in schedule() 430 ScheduledSUnits.clear(); in undoSchedule() 1807 SUnit *SU = &SUnits[ScheduledSUnits[i]]; in moveLowLatencies() 1832 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1834 ScheduledSUnits[BestPos] = SU->NodeNum; in moveLowLatencies() 1859 ScheduledSUnits[u] = ScheduledSUnits[u-1]; in moveLowLatencies() 1861 ScheduledSUnits[MinPos] = SU->NodeNum; in moveLowLatencies() 1989 ScheduledSUnits = Best.SUs; in schedule() [all …]
|