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Searched refs:SecondMI (Results 1 – 25 of 96) sorted by relevance

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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/
H A DAArch64MacroFusion.cpp25 if (SecondMI.getOpcode() != AArch64::Bcc) in isArithmeticBccPair()
66 if (SecondMI.getOpcode() != AArch64::CBZW && in isArithmeticCbzPair()
67 SecondMI.getOpcode() != AArch64::CBZX && in isArithmeticCbzPair()
68 SecondMI.getOpcode() != AArch64::CBNZW && in isArithmeticCbzPair()
69 SecondMI.getOpcode() != AArch64::CBNZX) in isArithmeticCbzPair()
117 switch (SecondMI.getOpcode()) { in isAESPair()
161 SecondMI.getOpcode() == AArch64::ADDXri) in isLiteralsPair()
167 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
173 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
190 switch (SecondMI.getOpcode()) { in isAddressLdStPair()
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AArch64/
H A DAArch64MacroFusion.cpp25 if (SecondMI.getOpcode() != AArch64::Bcc) in isArithmeticBccPair()
66 if (SecondMI.getOpcode() != AArch64::CBZW && in isArithmeticCbzPair()
67 SecondMI.getOpcode() != AArch64::CBZX && in isArithmeticCbzPair()
68 SecondMI.getOpcode() != AArch64::CBNZW && in isArithmeticCbzPair()
69 SecondMI.getOpcode() != AArch64::CBNZX) in isArithmeticCbzPair()
117 switch (SecondMI.getOpcode()) { in isAESPair()
161 SecondMI.getOpcode() == AArch64::ADDXri) in isLiteralsPair()
167 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
173 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
190 switch (SecondMI.getOpcode()) { in isAddressLdStPair()
[all …]
/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AArch64/
H A DAArch64MacroFusion.cpp25 if (SecondMI.getOpcode() != AArch64::Bcc) in isArithmeticBccPair()
66 if (SecondMI.getOpcode() != AArch64::CBZW && in isArithmeticCbzPair()
67 SecondMI.getOpcode() != AArch64::CBZX && in isArithmeticCbzPair()
68 SecondMI.getOpcode() != AArch64::CBNZW && in isArithmeticCbzPair()
69 SecondMI.getOpcode() != AArch64::CBNZX) in isArithmeticCbzPair()
117 switch (SecondMI.getOpcode()) { in isAESPair()
161 SecondMI.getOpcode() == AArch64::ADDXri) in isLiteralsPair()
167 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
173 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
190 switch (SecondMI.getOpcode()) { in isAddressLdStPair()
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AArch64/
H A DAArch64MacroFusion.cpp25 if (SecondMI.getOpcode() != AArch64::Bcc) in isArithmeticBccPair()
66 if (SecondMI.getOpcode() != AArch64::CBZW && in isArithmeticCbzPair()
67 SecondMI.getOpcode() != AArch64::CBZX && in isArithmeticCbzPair()
68 SecondMI.getOpcode() != AArch64::CBNZW && in isArithmeticCbzPair()
69 SecondMI.getOpcode() != AArch64::CBNZX) in isArithmeticCbzPair()
117 switch (SecondMI.getOpcode()) { in isAESPair()
161 SecondMI.getOpcode() == AArch64::ADDXri) in isLiteralsPair()
167 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
173 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
190 switch (SecondMI.getOpcode()) { in isAddressLdStPair()
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
H A DAArch64MacroFusion.cpp25 if (SecondMI.getOpcode() != AArch64::Bcc) in isArithmeticBccPair()
66 if (SecondMI.getOpcode() != AArch64::CBZW && in isArithmeticCbzPair()
67 SecondMI.getOpcode() != AArch64::CBZX && in isArithmeticCbzPair()
68 SecondMI.getOpcode() != AArch64::CBNZW && in isArithmeticCbzPair()
69 SecondMI.getOpcode() != AArch64::CBNZX) in isArithmeticCbzPair()
117 switch (SecondMI.getOpcode()) { in isAESPair()
161 SecondMI.getOpcode() == AArch64::ADDXri) in isLiteralsPair()
167 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
173 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
190 switch (SecondMI.getOpcode()) { in isAddressLdStPair()
[all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64MacroFusion.cpp25 if (SecondMI.getOpcode() != AArch64::Bcc) in isArithmeticBccPair()
66 if (SecondMI.getOpcode() != AArch64::CBZW && in isArithmeticCbzPair()
67 SecondMI.getOpcode() != AArch64::CBZX && in isArithmeticCbzPair()
68 SecondMI.getOpcode() != AArch64::CBNZW && in isArithmeticCbzPair()
69 SecondMI.getOpcode() != AArch64::CBNZX) in isArithmeticCbzPair()
117 switch (SecondMI.getOpcode()) { in isAESPair()
161 SecondMI.getOpcode() == AArch64::ADDXri) in isLiteralsPair()
167 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
173 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
190 switch (SecondMI.getOpcode()) { in isAddressLdStPair()
[all …]
/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AArch64/
H A DAArch64MacroFusion.cpp25 if (SecondMI.getOpcode() != AArch64::Bcc) in isArithmeticBccPair()
66 if (SecondMI.getOpcode() != AArch64::CBZW && in isArithmeticCbzPair()
67 SecondMI.getOpcode() != AArch64::CBZX && in isArithmeticCbzPair()
68 SecondMI.getOpcode() != AArch64::CBNZW && in isArithmeticCbzPair()
69 SecondMI.getOpcode() != AArch64::CBNZX) in isArithmeticCbzPair()
117 switch (SecondMI.getOpcode()) { in isAESPair()
161 SecondMI.getOpcode() == AArch64::ADDXri) in isLiteralsPair()
167 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
173 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
190 switch (SecondMI.getOpcode()) { in isAddressLdStPair()
[all …]
/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AArch64/
H A DAArch64MacroFusion.cpp26 if (SecondMI.getOpcode() != AArch64::Bcc) in isArithmeticBccPair()
67 if (SecondMI.getOpcode() != AArch64::CBZW && in isArithmeticCbzPair()
68 SecondMI.getOpcode() != AArch64::CBZX && in isArithmeticCbzPair()
69 SecondMI.getOpcode() != AArch64::CBNZW && in isArithmeticCbzPair()
70 SecondMI.getOpcode() != AArch64::CBNZX) in isArithmeticCbzPair()
118 switch (SecondMI.getOpcode()) { in isAESPair()
162 SecondMI.getOpcode() == AArch64::ADDXri) in isLiteralsPair()
168 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
174 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
191 switch (SecondMI.getOpcode()) { in isAddressLdStPair()
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/
H A DAArch64MacroFusion.cpp24 if (SecondMI.getOpcode() != AArch64::Bcc) in isArithmeticBccPair()
72 if (SecondMI.getOpcode() != AArch64::CBZW && in isArithmeticCbzPair()
73 SecondMI.getOpcode() != AArch64::CBZX && in isArithmeticCbzPair()
74 SecondMI.getOpcode() != AArch64::CBNZW && in isArithmeticCbzPair()
75 SecondMI.getOpcode() != AArch64::CBNZX) in isArithmeticCbzPair()
123 switch (SecondMI.getOpcode()) { in isAESPair()
167 SecondMI.getOpcode() == AArch64::ADDXri) in isLiteralsPair()
173 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
179 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
196 switch (SecondMI.getOpcode()) { in isAddressLdStPair()
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AArch64/
H A DAArch64MacroFusion.cpp24 if (SecondMI.getOpcode() != AArch64::Bcc) in isArithmeticBccPair()
72 if (SecondMI.getOpcode() != AArch64::CBZW && in isArithmeticCbzPair()
73 SecondMI.getOpcode() != AArch64::CBZX && in isArithmeticCbzPair()
74 SecondMI.getOpcode() != AArch64::CBNZW && in isArithmeticCbzPair()
75 SecondMI.getOpcode() != AArch64::CBNZX) in isArithmeticCbzPair()
123 switch (SecondMI.getOpcode()) { in isAESPair()
167 SecondMI.getOpcode() == AArch64::ADDXri) in isLiteralsPair()
173 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
179 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
196 switch (SecondMI.getOpcode()) { in isAddressLdStPair()
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/
H A DAArch64MacroFusion.cpp25 if (SecondMI.getOpcode() != AArch64::Bcc) in isArithmeticBccPair()
73 if (SecondMI.getOpcode() != AArch64::CBZW && in isArithmeticCbzPair()
74 SecondMI.getOpcode() != AArch64::CBZX && in isArithmeticCbzPair()
75 SecondMI.getOpcode() != AArch64::CBNZW && in isArithmeticCbzPair()
76 SecondMI.getOpcode() != AArch64::CBNZX) in isArithmeticCbzPair()
124 switch (SecondMI.getOpcode()) { in isAESPair()
168 SecondMI.getOpcode() == AArch64::ADDXri) in isLiteralsPair()
174 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
180 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
197 switch (SecondMI.getOpcode()) { in isAddressLdStPair()
[all …]
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64MacroFusion.cpp24 if (SecondMI.getOpcode() != AArch64::Bcc) in isArithmeticBccPair()
72 if (SecondMI.getOpcode() != AArch64::CBZW && in isArithmeticCbzPair()
73 SecondMI.getOpcode() != AArch64::CBZX && in isArithmeticCbzPair()
74 SecondMI.getOpcode() != AArch64::CBNZW && in isArithmeticCbzPair()
75 SecondMI.getOpcode() != AArch64::CBNZX) in isArithmeticCbzPair()
123 switch (SecondMI.getOpcode()) { in isAESPair()
167 SecondMI.getOpcode() == AArch64::ADDXri) in isLiteralsPair()
173 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
179 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
196 switch (SecondMI.getOpcode()) { in isAddressLdStPair()
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AArch64/
H A DAArch64MacroFusion.cpp24 if (SecondMI.getOpcode() != AArch64::Bcc) in isArithmeticBccPair()
72 if (SecondMI.getOpcode() != AArch64::CBZW && in isArithmeticCbzPair()
73 SecondMI.getOpcode() != AArch64::CBZX && in isArithmeticCbzPair()
74 SecondMI.getOpcode() != AArch64::CBNZW && in isArithmeticCbzPair()
75 SecondMI.getOpcode() != AArch64::CBNZX) in isArithmeticCbzPair()
123 switch (SecondMI.getOpcode()) { in isAESPair()
167 SecondMI.getOpcode() == AArch64::ADDXri) in isLiteralsPair()
173 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
179 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
196 switch (SecondMI.getOpcode()) { in isAddressLdStPair()
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/
H A DAArch64MacroFusion.cpp24 if (SecondMI.getOpcode() != AArch64::Bcc) in isArithmeticBccPair()
72 if (SecondMI.getOpcode() != AArch64::CBZW && in isArithmeticCbzPair()
73 SecondMI.getOpcode() != AArch64::CBZX && in isArithmeticCbzPair()
74 SecondMI.getOpcode() != AArch64::CBNZW && in isArithmeticCbzPair()
75 SecondMI.getOpcode() != AArch64::CBNZX) in isArithmeticCbzPair()
123 switch (SecondMI.getOpcode()) { in isAESPair()
167 SecondMI.getOpcode() == AArch64::ADDXri) in isLiteralsPair()
173 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
179 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
196 switch (SecondMI.getOpcode()) { in isAddressLdStPair()
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/
H A DAArch64MacroFusion.cpp25 if (SecondMI.getOpcode() != AArch64::Bcc) in isArithmeticBccPair()
73 if (SecondMI.getOpcode() != AArch64::CBZW && in isArithmeticCbzPair()
74 SecondMI.getOpcode() != AArch64::CBZX && in isArithmeticCbzPair()
75 SecondMI.getOpcode() != AArch64::CBNZW && in isArithmeticCbzPair()
76 SecondMI.getOpcode() != AArch64::CBNZX) in isArithmeticCbzPair()
124 switch (SecondMI.getOpcode()) { in isAESPair()
168 SecondMI.getOpcode() == AArch64::ADDXri) in isLiteralsPair()
174 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
180 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
197 switch (SecondMI.getOpcode()) { in isAddressLdStPair()
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/
H A DAArch64MacroFusion.cpp24 if (SecondMI.getOpcode() != AArch64::Bcc) in isArithmeticBccPair()
72 if (SecondMI.getOpcode() != AArch64::CBZW && in isArithmeticCbzPair()
73 SecondMI.getOpcode() != AArch64::CBZX && in isArithmeticCbzPair()
74 SecondMI.getOpcode() != AArch64::CBNZW && in isArithmeticCbzPair()
75 SecondMI.getOpcode() != AArch64::CBNZX) in isArithmeticCbzPair()
123 switch (SecondMI.getOpcode()) { in isAESPair()
167 SecondMI.getOpcode() == AArch64::ADDXri) in isLiteralsPair()
173 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
179 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
196 switch (SecondMI.getOpcode()) { in isAddressLdStPair()
[all …]
/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AArch64/
H A DAArch64MacroFusion.cpp26 if (SecondMI.getOpcode() == AArch64::Bcc) { in isArithmeticBccPair()
65 unsigned SecondOpcode = SecondMI.getOpcode(); in isArithmeticCbzPair()
112 const MachineInstr &SecondMI) { in isAESPair() argument
117 unsigned SecondOpcode = SecondMI.getOpcode(); in isAESPair()
142 unsigned SecondOpcode = SecondMI.getOpcode(); in isLiteralsPair()
153 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
159 SecondMI.getOperand(3).getImm() == 16)) in isLiteralsPair()
166 SecondMI.getOperand(3).getImm() == 48)) in isLiteralsPair()
175 unsigned SecondOpcode = SecondMI.getOpcode(); in isAddressLdStPair()
207 return (SecondMI.getOperand(2).getImm() == 0); in isAddressLdStPair()
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/PowerPC/
H A DPPCMacroFusion.cpp68 const MachineInstr &SecondMI, in matchingRegOps() argument
71 const MachineOperand &Op2 = SecondMI.getOperand(SecondMIOpIndex); in matchingRegOps()
82 const MachineInstr &SecondMI) { in checkOpConstraints() argument
90 const MachineOperand &RA = SecondMI.getOperand(1); in checkOpConstraints()
99 const MachineOperand &RT = SecondMI.getOperand(0); in checkOpConstraints()
107 if (!matchingRegOps(SecondMI, 0, SecondMI, 2) || in checkOpConstraints()
122 const MachineOperand &D = SecondMI.getOperand(1); in checkOpConstraints()
128 if (SecondMI.getOpcode() == PPC::LD) in checkOpConstraints()
147 const MachineInstr &SecondMI) { in shouldScheduleAdjacent() argument
168 if (Feature.hasOp2(SecondMI.getOpcode())) { in shouldScheduleAdjacent()
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/PowerPC/
H A DPPCMacroFusion.cpp68 const MachineInstr &SecondMI, in matchingRegOps() argument
71 const MachineOperand &Op2 = SecondMI.getOperand(SecondMIOpIndex); in matchingRegOps()
82 const MachineInstr &SecondMI) { in checkOpConstraints() argument
90 const MachineOperand &RA = SecondMI.getOperand(1); in checkOpConstraints()
99 const MachineOperand &RT = SecondMI.getOperand(0); in checkOpConstraints()
107 if (!matchingRegOps(SecondMI, 0, SecondMI, 2) || in checkOpConstraints()
122 const MachineOperand &D = SecondMI.getOperand(1); in checkOpConstraints()
128 if (SecondMI.getOpcode() == PPC::LD) in checkOpConstraints()
147 const MachineInstr &SecondMI) { in shouldScheduleAdjacent() argument
168 if (Feature.hasOp2(SecondMI.getOpcode())) { in shouldScheduleAdjacent()
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/PowerPC/
H A DPPCMacroFusion.cpp68 const MachineInstr &SecondMI, in matchingRegOps() argument
71 const MachineOperand &Op2 = SecondMI.getOperand(SecondMIOpIndex); in matchingRegOps()
82 const MachineInstr &SecondMI) { in checkOpConstraints() argument
90 const MachineOperand &RA = SecondMI.getOperand(1); in checkOpConstraints()
99 const MachineOperand &RT = SecondMI.getOperand(0); in checkOpConstraints()
107 if (!matchingRegOps(SecondMI, 0, SecondMI, 2) || in checkOpConstraints()
122 const MachineOperand &D = SecondMI.getOperand(1); in checkOpConstraints()
128 if (SecondMI.getOpcode() == PPC::LD) in checkOpConstraints()
147 const MachineInstr &SecondMI) { in shouldScheduleAdjacent() argument
168 if (Feature.hasOp2(SecondMI.getOpcode())) { in shouldScheduleAdjacent()
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/PowerPC/
H A DPPCMacroFusion.cpp68 const MachineInstr &SecondMI, in matchingRegOps() argument
71 const MachineOperand &Op2 = SecondMI.getOperand(SecondMIOpIndex); in matchingRegOps()
82 const MachineInstr &SecondMI) { in checkOpConstraints() argument
90 const MachineOperand &RA = SecondMI.getOperand(1); in checkOpConstraints()
99 const MachineOperand &RT = SecondMI.getOperand(0); in checkOpConstraints()
107 if (!matchingRegOps(SecondMI, 0, SecondMI, 2) || in checkOpConstraints()
122 const MachineOperand &D = SecondMI.getOperand(1); in checkOpConstraints()
128 if (SecondMI.getOpcode() == PPC::LD) in checkOpConstraints()
147 const MachineInstr &SecondMI) { in shouldScheduleAdjacent() argument
168 if (Feature.hasOp2(SecondMI.getOpcode())) { in shouldScheduleAdjacent()
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/PowerPC/
H A DPPCMacroFusion.cpp68 const MachineInstr &SecondMI, in matchingRegOps() argument
71 const MachineOperand &Op2 = SecondMI.getOperand(SecondMIOpIndex); in matchingRegOps()
82 const MachineInstr &SecondMI) { in checkOpConstraints() argument
90 const MachineOperand &RA = SecondMI.getOperand(1); in checkOpConstraints()
99 const MachineOperand &RT = SecondMI.getOperand(0); in checkOpConstraints()
107 if (!matchingRegOps(SecondMI, 0, SecondMI, 2) || in checkOpConstraints()
122 const MachineOperand &D = SecondMI.getOperand(1); in checkOpConstraints()
128 if (SecondMI.getOpcode() == PPC::LD) in checkOpConstraints()
147 const MachineInstr &SecondMI) { in shouldScheduleAdjacent() argument
168 if (Feature.hasOp2(SecondMI.getOpcode())) { in shouldScheduleAdjacent()
[all …]
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCMacroFusion.cpp68 const MachineInstr &SecondMI, in matchingRegOps() argument
71 const MachineOperand &Op2 = SecondMI.getOperand(SecondMIOpIndex); in matchingRegOps()
82 const MachineInstr &SecondMI) { in checkOpConstraints() argument
90 const MachineOperand &RA = SecondMI.getOperand(1); in checkOpConstraints()
99 const MachineOperand &RT = SecondMI.getOperand(0); in checkOpConstraints()
107 if (!matchingRegOps(SecondMI, 0, SecondMI, 2) || in checkOpConstraints()
122 const MachineOperand &D = SecondMI.getOperand(1); in checkOpConstraints()
128 if (SecondMI.getOpcode() == PPC::LD) in checkOpConstraints()
147 const MachineInstr &SecondMI) { in shouldScheduleAdjacent() argument
168 if (Feature.hasOp2(SecondMI.getOpcode())) { in shouldScheduleAdjacent()
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/PowerPC/
H A DPPCMacroFusion.cpp68 const MachineInstr &SecondMI, in matchingRegOps() argument
71 const MachineOperand &Op2 = SecondMI.getOperand(SecondMIOpIndex); in matchingRegOps()
82 const MachineInstr &SecondMI) { in checkOpConstraints() argument
90 const MachineOperand &RA = SecondMI.getOperand(1); in checkOpConstraints()
99 const MachineOperand &RT = SecondMI.getOperand(0); in checkOpConstraints()
107 if (!matchingRegOps(SecondMI, 0, SecondMI, 2) || in checkOpConstraints()
122 const MachineOperand &D = SecondMI.getOperand(1); in checkOpConstraints()
128 if (SecondMI.getOpcode() == PPC::LD) in checkOpConstraints()
147 const MachineInstr &SecondMI) { in shouldScheduleAdjacent() argument
168 if (Feature.hasOp2(SecondMI.getOpcode())) { in shouldScheduleAdjacent()
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/PowerPC/
H A DPPCMacroFusion.cpp68 const MachineInstr &SecondMI, in matchingRegOps() argument
71 const MachineOperand &Op2 = SecondMI.getOperand(SecondMIOpIndex); in matchingRegOps()
82 const MachineInstr &SecondMI) { in checkOpConstraints() argument
90 const MachineOperand &RA = SecondMI.getOperand(1); in checkOpConstraints()
99 const MachineOperand &RT = SecondMI.getOperand(0); in checkOpConstraints()
107 if (!matchingRegOps(SecondMI, 0, SecondMI, 2) || in checkOpConstraints()
122 const MachineOperand &D = SecondMI.getOperand(1); in checkOpConstraints()
128 if (SecondMI.getOpcode() == PPC::LD) in checkOpConstraints()
147 const MachineInstr &SecondMI) { in shouldScheduleAdjacent() argument
168 if (Feature.hasOp2(SecondMI.getOpcode())) { in shouldScheduleAdjacent()
[all …]

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