Home
last modified time | relevance | path

Searched refs:ShOpc (Results 1 – 25 of 135) sorted by relevance

123456

/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/ARM/InstPrinter/
H A DARMInstPrinter.cpp53 static void printRegImmShift(raw_ostream &O, ARM_AM::ShiftOpc ShOpc, in printRegImmShift() argument
55 if (ShOpc == ARM_AM::no_shift || (ShOpc == ARM_AM::lsl && !ShImm)) in printRegImmShift()
59 assert(!(ShOpc == ARM_AM::ror && !ShImm) && "Cannot have ror #0"); in printRegImmShift()
60 O << getShiftOpcStr(ShOpc); in printRegImmShift()
62 if (ShOpc != ARM_AM::rrx) { in printRegImmShift()
379 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm()); in printSORegRegOperand() local
380 O << ", " << ARM_AM::getShiftOpcStr(ShOpc); in printSORegRegOperand()
381 if (ShOpc == ARM_AM::rrx) in printSORegRegOperand()
/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/ARM/InstPrinter/
H A DARMInstPrinter.cpp53 static void printRegImmShift(raw_ostream &O, ARM_AM::ShiftOpc ShOpc, in printRegImmShift() argument
55 if (ShOpc == ARM_AM::no_shift || (ShOpc == ARM_AM::lsl && !ShImm)) in printRegImmShift()
59 assert(!(ShOpc == ARM_AM::ror && !ShImm) && "Cannot have ror #0"); in printRegImmShift()
60 O << getShiftOpcStr(ShOpc); in printRegImmShift()
62 if (ShOpc != ARM_AM::rrx) { in printRegImmShift()
364 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm()); in printSORegRegOperand() local
365 O << ", " << ARM_AM::getShiftOpcStr(ShOpc); in printSORegRegOperand()
366 if (ShOpc == ARM_AM::rrx) in printSORegRegOperand()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.cpp52 static void printRegImmShift(raw_ostream &O, ARM_AM::ShiftOpc ShOpc, in printRegImmShift() argument
54 if (ShOpc == ARM_AM::no_shift || (ShOpc == ARM_AM::lsl && !ShImm)) in printRegImmShift()
58 assert(!(ShOpc == ARM_AM::ror && !ShImm) && "Cannot have ror #0"); in printRegImmShift()
59 O << getShiftOpcStr(ShOpc); in printRegImmShift()
61 if (ShOpc != ARM_AM::rrx) { in printRegImmShift()
391 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm()); in printSORegRegOperand() local
392 O << ", " << ARM_AM::getShiftOpcStr(ShOpc); in printSORegRegOperand()
393 if (ShOpc == ARM_AM::rrx) in printSORegRegOperand()
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.cpp52 static void printRegImmShift(raw_ostream &O, ARM_AM::ShiftOpc ShOpc, in printRegImmShift() argument
54 if (ShOpc == ARM_AM::no_shift || (ShOpc == ARM_AM::lsl && !ShImm)) in printRegImmShift()
58 assert(!(ShOpc == ARM_AM::ror && !ShImm) && "Cannot have ror #0"); in printRegImmShift()
59 O << getShiftOpcStr(ShOpc); in printRegImmShift()
61 if (ShOpc != ARM_AM::rrx) { in printRegImmShift()
391 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm()); in printSORegRegOperand() local
392 O << ", " << ARM_AM::getShiftOpcStr(ShOpc); in printSORegRegOperand()
393 if (ShOpc == ARM_AM::rrx) in printSORegRegOperand()
/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.cpp52 static void printRegImmShift(raw_ostream &O, ARM_AM::ShiftOpc ShOpc, in printRegImmShift() argument
54 if (ShOpc == ARM_AM::no_shift || (ShOpc == ARM_AM::lsl && !ShImm)) in printRegImmShift()
58 assert(!(ShOpc == ARM_AM::ror && !ShImm) && "Cannot have ror #0"); in printRegImmShift()
59 O << getShiftOpcStr(ShOpc); in printRegImmShift()
61 if (ShOpc != ARM_AM::rrx) { in printRegImmShift()
391 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm()); in printSORegRegOperand() local
392 O << ", " << ARM_AM::getShiftOpcStr(ShOpc); in printSORegRegOperand()
393 if (ShOpc == ARM_AM::rrx) in printSORegRegOperand()
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.cpp53 static void printRegImmShift(raw_ostream &O, ARM_AM::ShiftOpc ShOpc,
55 if (ShOpc == ARM_AM::no_shift || (ShOpc == ARM_AM::lsl && !ShImm))
59 assert(!(ShOpc == ARM_AM::ror && !ShImm) && "Cannot have ror #0");
60 O << getShiftOpcStr(ShOpc);
62 if (ShOpc != ARM_AM::rrx) {
406 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm());
407 O << ", " << ARM_AM::getShiftOpcStr(ShOpc);
408 if (ShOpc == ARM_AM::rrx)
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.cpp53 static void printRegImmShift(raw_ostream &O, ARM_AM::ShiftOpc ShOpc, in printRegImmShift() argument
55 if (ShOpc == ARM_AM::no_shift || (ShOpc == ARM_AM::lsl && !ShImm)) in printRegImmShift()
59 assert(!(ShOpc == ARM_AM::ror && !ShImm) && "Cannot have ror #0"); in printRegImmShift()
60 O << getShiftOpcStr(ShOpc); in printRegImmShift()
62 if (ShOpc != ARM_AM::rrx) { in printRegImmShift()
406 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm()); in printSORegRegOperand() local
407 O << ", " << ARM_AM::getShiftOpcStr(ShOpc); in printSORegRegOperand()
408 if (ShOpc == ARM_AM::rrx) in printSORegRegOperand()
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.cpp52 static void printRegImmShift(raw_ostream &O, ARM_AM::ShiftOpc ShOpc, in printRegImmShift() argument
54 if (ShOpc == ARM_AM::no_shift || (ShOpc == ARM_AM::lsl && !ShImm)) in printRegImmShift()
58 assert(!(ShOpc == ARM_AM::ror && !ShImm) && "Cannot have ror #0"); in printRegImmShift()
59 O << getShiftOpcStr(ShOpc); in printRegImmShift()
61 if (ShOpc != ARM_AM::rrx) { in printRegImmShift()
391 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm()); in printSORegRegOperand() local
392 O << ", " << ARM_AM::getShiftOpcStr(ShOpc); in printSORegRegOperand()
393 if (ShOpc == ARM_AM::rrx) in printSORegRegOperand()
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.cpp52 static void printRegImmShift(raw_ostream &O, ARM_AM::ShiftOpc ShOpc, in printRegImmShift() argument
54 if (ShOpc == ARM_AM::no_shift || (ShOpc == ARM_AM::lsl && !ShImm)) in printRegImmShift()
58 assert(!(ShOpc == ARM_AM::ror && !ShImm) && "Cannot have ror #0"); in printRegImmShift()
59 O << getShiftOpcStr(ShOpc); in printRegImmShift()
61 if (ShOpc != ARM_AM::rrx) { in printRegImmShift()
391 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm()); in printSORegRegOperand() local
392 O << ", " << ARM_AM::getShiftOpcStr(ShOpc); in printSORegRegOperand()
393 if (ShOpc == ARM_AM::rrx) in printSORegRegOperand()
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.cpp53 static void printRegImmShift(raw_ostream &O, ARM_AM::ShiftOpc ShOpc, in printRegImmShift() argument
55 if (ShOpc == ARM_AM::no_shift || (ShOpc == ARM_AM::lsl && !ShImm)) in printRegImmShift()
59 assert(!(ShOpc == ARM_AM::ror && !ShImm) && "Cannot have ror #0"); in printRegImmShift()
60 O << getShiftOpcStr(ShOpc); in printRegImmShift()
62 if (ShOpc != ARM_AM::rrx) { in printRegImmShift()
406 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm()); in printSORegRegOperand() local
407 O << ", " << ARM_AM::getShiftOpcStr(ShOpc); in printSORegRegOperand()
408 if (ShOpc == ARM_AM::rrx) in printSORegRegOperand()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.cpp52 static void printRegImmShift(raw_ostream &O, ARM_AM::ShiftOpc ShOpc, in printRegImmShift() argument
54 if (ShOpc == ARM_AM::no_shift || (ShOpc == ARM_AM::lsl && !ShImm)) in printRegImmShift()
58 assert(!(ShOpc == ARM_AM::ror && !ShImm) && "Cannot have ror #0"); in printRegImmShift()
59 O << getShiftOpcStr(ShOpc); in printRegImmShift()
61 if (ShOpc != ARM_AM::rrx) { in printRegImmShift()
391 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm()); in printSORegRegOperand() local
392 O << ", " << ARM_AM::getShiftOpcStr(ShOpc); in printSORegRegOperand()
393 if (ShOpc == ARM_AM::rrx) in printSORegRegOperand()
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.cpp53 static void printRegImmShift(raw_ostream &O, ARM_AM::ShiftOpc ShOpc, in printRegImmShift() argument
55 if (ShOpc == ARM_AM::no_shift || (ShOpc == ARM_AM::lsl && !ShImm)) in printRegImmShift()
59 assert(!(ShOpc == ARM_AM::ror && !ShImm) && "Cannot have ror #0"); in printRegImmShift()
60 O << getShiftOpcStr(ShOpc); in printRegImmShift()
62 if (ShOpc != ARM_AM::rrx) { in printRegImmShift()
406 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm()); in printSORegRegOperand() local
407 O << ", " << ARM_AM::getShiftOpcStr(ShOpc); in printSORegRegOperand()
408 if (ShOpc == ARM_AM::rrx) in printSORegRegOperand()
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.cpp53 static void printRegImmShift(raw_ostream &O, ARM_AM::ShiftOpc ShOpc, in printRegImmShift() argument
55 if (ShOpc == ARM_AM::no_shift || (ShOpc == ARM_AM::lsl && !ShImm)) in printRegImmShift()
59 assert(!(ShOpc == ARM_AM::ror && !ShImm) && "Cannot have ror #0"); in printRegImmShift()
60 O << getShiftOpcStr(ShOpc); in printRegImmShift()
62 if (ShOpc != ARM_AM::rrx) { in printRegImmShift()
406 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm()); in printSORegRegOperand() local
407 O << ", " << ARM_AM::getShiftOpcStr(ShOpc); in printSORegRegOperand()
408 if (ShOpc == ARM_AM::rrx) in printSORegRegOperand()
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.cpp52 static void printRegImmShift(raw_ostream &O, ARM_AM::ShiftOpc ShOpc, in printRegImmShift() argument
54 if (ShOpc == ARM_AM::no_shift || (ShOpc == ARM_AM::lsl && !ShImm)) in printRegImmShift()
58 assert(!(ShOpc == ARM_AM::ror && !ShImm) && "Cannot have ror #0"); in printRegImmShift()
59 O << getShiftOpcStr(ShOpc); in printRegImmShift()
61 if (ShOpc != ARM_AM::rrx) { in printRegImmShift()
391 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm()); in printSORegRegOperand() local
392 O << ", " << ARM_AM::getShiftOpcStr(ShOpc); in printSORegRegOperand()
393 if (ShOpc == ARM_AM::rrx) in printSORegRegOperand()
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.cpp52 static void printRegImmShift(raw_ostream &O, ARM_AM::ShiftOpc ShOpc, in printRegImmShift() argument
54 if (ShOpc == ARM_AM::no_shift || (ShOpc == ARM_AM::lsl && !ShImm)) in printRegImmShift()
58 assert(!(ShOpc == ARM_AM::ror && !ShImm) && "Cannot have ror #0"); in printRegImmShift()
59 O << getShiftOpcStr(ShOpc); in printRegImmShift()
61 if (ShOpc != ARM_AM::rrx) { in printRegImmShift()
391 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm()); in printSORegRegOperand() local
392 O << ", " << ARM_AM::getShiftOpcStr(ShOpc); in printSORegRegOperand()
393 if (ShOpc == ARM_AM::rrx) in printSORegRegOperand()
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.cpp53 static void printRegImmShift(raw_ostream &O, ARM_AM::ShiftOpc ShOpc, in printRegImmShift() argument
55 if (ShOpc == ARM_AM::no_shift || (ShOpc == ARM_AM::lsl && !ShImm)) in printRegImmShift()
59 assert(!(ShOpc == ARM_AM::ror && !ShImm) && "Cannot have ror #0"); in printRegImmShift()
60 O << getShiftOpcStr(ShOpc); in printRegImmShift()
62 if (ShOpc != ARM_AM::rrx) { in printRegImmShift()
406 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm()); in printSORegRegOperand() local
407 O << ", " << ARM_AM::getShiftOpcStr(ShOpc); in printSORegRegOperand()
408 if (ShOpc == ARM_AM::rrx) in printSORegRegOperand()
/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.cpp52 static void printRegImmShift(raw_ostream &O, ARM_AM::ShiftOpc ShOpc, in printRegImmShift() argument
54 if (ShOpc == ARM_AM::no_shift || (ShOpc == ARM_AM::lsl && !ShImm)) in printRegImmShift()
58 assert(!(ShOpc == ARM_AM::ror && !ShImm) && "Cannot have ror #0"); in printRegImmShift()
59 O << getShiftOpcStr(ShOpc); in printRegImmShift()
61 if (ShOpc != ARM_AM::rrx) { in printRegImmShift()
390 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm()); in printSORegRegOperand() local
391 O << ", " << ARM_AM::getShiftOpcStr(ShOpc); in printSORegRegOperand()
392 if (ShOpc == ARM_AM::rrx) in printSORegRegOperand()
/dports/devel/capstone3/capstone-3.0.5/arch/ARM/
H A DARMInstPrinter.c179 static void printRegImmShift(MCInst *MI, SStream *O, ARM_AM_ShiftOpc ShOpc, unsigned ShImm) in printRegImmShift() argument
181 if (ShOpc == ARM_AM_no_shift || (ShOpc == ARM_AM_lsl && !ShImm)) in printRegImmShift()
186 SStream_concat0(O, ARM_AM_getShiftOpcStr(ShOpc)); in printRegImmShift()
189 …at_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].shift.type = (arm_shifter)ShOpc; in printRegImmShift()
191 …nsn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.type = (arm_shifter)ShOpc; in printRegImmShift()
194 if (ShOpc != ARM_AM_rrx) { in printRegImmShift()
824 ARM_AM_ShiftOpc ShOpc; in printSORegRegOperand() local
837 ShOpc = ARM_AM_getSORegShOp((unsigned int)MCOperand_getImm(MO3)); in printSORegRegOperand()
839 SStream_concat0(O, ARM_AM_getShiftOpcStr(ShOpc)); in printSORegRegOperand()
840 if (ShOpc == ARM_AM_rrx) in printSORegRegOperand()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/capstone/arch/ARM/
H A DARMInstPrinter.c179 static void printRegImmShift(MCInst *MI, SStream *O, ARM_AM_ShiftOpc ShOpc, unsigned ShImm) in printRegImmShift() argument
181 if (ShOpc == ARM_AM_no_shift || (ShOpc == ARM_AM_lsl && !ShImm)) in printRegImmShift()
186 SStream_concat0(O, ARM_AM_getShiftOpcStr(ShOpc)); in printRegImmShift()
189 …at_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].shift.type = (arm_shifter)ShOpc; in printRegImmShift()
191 …nsn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.type = (arm_shifter)ShOpc; in printRegImmShift()
194 if (ShOpc != ARM_AM_rrx) { in printRegImmShift()
837 ARM_AM_ShiftOpc ShOpc; in printSORegRegOperand() local
850 ShOpc = ARM_AM_getSORegShOp((unsigned int)MCOperand_getImm(MO3)); in printSORegRegOperand()
852 SStream_concat0(O, ARM_AM_getShiftOpcStr(ShOpc)); in printSORegRegOperand()
853 if (ShOpc == ARM_AM_rrx) in printSORegRegOperand()
/dports/emulators/qemu-utils/qemu-4.2.1/capstone/arch/ARM/
H A DARMInstPrinter.c179 static void printRegImmShift(MCInst *MI, SStream *O, ARM_AM_ShiftOpc ShOpc, unsigned ShImm) in printRegImmShift() argument
181 if (ShOpc == ARM_AM_no_shift || (ShOpc == ARM_AM_lsl && !ShImm)) in printRegImmShift()
186 SStream_concat0(O, ARM_AM_getShiftOpcStr(ShOpc)); in printRegImmShift()
189 …at_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].shift.type = (arm_shifter)ShOpc; in printRegImmShift()
191 …nsn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.type = (arm_shifter)ShOpc; in printRegImmShift()
194 if (ShOpc != ARM_AM_rrx) { in printRegImmShift()
837 ARM_AM_ShiftOpc ShOpc; in printSORegRegOperand() local
850 ShOpc = ARM_AM_getSORegShOp((unsigned int)MCOperand_getImm(MO3)); in printSORegRegOperand()
852 SStream_concat0(O, ARM_AM_getShiftOpcStr(ShOpc)); in printSORegRegOperand()
853 if (ShOpc == ARM_AM_rrx) in printSORegRegOperand()
/dports/emulators/qemu42/qemu-4.2.1/capstone/arch/ARM/
H A DARMInstPrinter.c179 static void printRegImmShift(MCInst *MI, SStream *O, ARM_AM_ShiftOpc ShOpc, unsigned ShImm) in printRegImmShift() argument
181 if (ShOpc == ARM_AM_no_shift || (ShOpc == ARM_AM_lsl && !ShImm)) in printRegImmShift()
186 SStream_concat0(O, ARM_AM_getShiftOpcStr(ShOpc)); in printRegImmShift()
189 …at_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].shift.type = (arm_shifter)ShOpc; in printRegImmShift()
191 …nsn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.type = (arm_shifter)ShOpc; in printRegImmShift()
194 if (ShOpc != ARM_AM_rrx) { in printRegImmShift()
837 ARM_AM_ShiftOpc ShOpc; in printSORegRegOperand() local
850 ShOpc = ARM_AM_getSORegShOp((unsigned int)MCOperand_getImm(MO3)); in printSORegRegOperand()
852 SStream_concat0(O, ARM_AM_getShiftOpcStr(ShOpc)); in printSORegRegOperand()
853 if (ShOpc == ARM_AM_rrx) in printSORegRegOperand()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/capstone/arch/ARM/
H A DARMInstPrinter.c179 static void printRegImmShift(MCInst *MI, SStream *O, ARM_AM_ShiftOpc ShOpc, unsigned ShImm) in printRegImmShift() argument
181 if (ShOpc == ARM_AM_no_shift || (ShOpc == ARM_AM_lsl && !ShImm)) in printRegImmShift()
186 SStream_concat0(O, ARM_AM_getShiftOpcStr(ShOpc)); in printRegImmShift()
189 …at_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].shift.type = (arm_shifter)ShOpc; in printRegImmShift()
191 …nsn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.type = (arm_shifter)ShOpc; in printRegImmShift()
194 if (ShOpc != ARM_AM_rrx) { in printRegImmShift()
837 ARM_AM_ShiftOpc ShOpc; in printSORegRegOperand() local
850 ShOpc = ARM_AM_getSORegShOp((unsigned int)MCOperand_getImm(MO3)); in printSORegRegOperand()
852 SStream_concat0(O, ARM_AM_getShiftOpcStr(ShOpc)); in printSORegRegOperand()
853 if (ShOpc == ARM_AM_rrx) in printSORegRegOperand()
/dports/devel/capstone4/capstone-4.0.2/arch/ARM/
H A DARMInstPrinter.c205 static void printRegImmShift(MCInst *MI, SStream *O, ARM_AM_ShiftOpc ShOpc, unsigned ShImm) in printRegImmShift() argument
207 if (ShOpc == ARM_AM_no_shift || (ShOpc == ARM_AM_lsl && !ShImm)) in printRegImmShift()
212 SStream_concat0(O, ARM_AM_getShiftOpcStr(ShOpc)); in printRegImmShift()
215 …at_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].shift.type = (arm_shifter)ShOpc; in printRegImmShift()
217 …nsn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.type = (arm_shifter)ShOpc; in printRegImmShift()
220 if (ShOpc != ARM_AM_rrx) { in printRegImmShift()
949 ARM_AM_ShiftOpc ShOpc; in printSORegRegOperand() local
963 ShOpc = ARM_AM_getSORegShOp((unsigned int)MCOperand_getImm(MO3)); in printSORegRegOperand()
965 SStream_concat0(O, ARM_AM_getShiftOpcStr(ShOpc)); in printSORegRegOperand()
966 if (ShOpc == ARM_AM_rrx) in printSORegRegOperand()
/dports/emulators/qemu/qemu-6.2.0/capstone/arch/ARM/
H A DARMInstPrinter.c215 static void printRegImmShift(MCInst *MI, SStream *O, ARM_AM_ShiftOpc ShOpc, unsigned ShImm) in printRegImmShift() argument
217 if (ShOpc == ARM_AM_no_shift || (ShOpc == ARM_AM_lsl && !ShImm)) in printRegImmShift()
223 SStream_concat0(O, ARM_AM_getShiftOpcStr(ShOpc)); in printRegImmShift()
227 …at_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].shift.type = (arm_shifter)ShOpc; in printRegImmShift()
229 …nsn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.type = (arm_shifter)ShOpc; in printRegImmShift()
232 if (ShOpc != ARM_AM_rrx) { in printRegImmShift()
951 ARM_AM_ShiftOpc ShOpc; in printSORegRegOperand() local
965 ShOpc = ARM_AM_getSORegShOp((unsigned int)MCOperand_getImm(MO3)); in printSORegRegOperand()
967 SStream_concat0(O, ARM_AM_getShiftOpcStr(ShOpc)); in printSORegRegOperand()
968 if (ShOpc == ARM_AM_rrx) in printSORegRegOperand()
/dports/emulators/qemu60/qemu-6.0.0/capstone/arch/ARM/
H A DARMInstPrinter.c215 static void printRegImmShift(MCInst *MI, SStream *O, ARM_AM_ShiftOpc ShOpc, unsigned ShImm) in printRegImmShift() argument
217 if (ShOpc == ARM_AM_no_shift || (ShOpc == ARM_AM_lsl && !ShImm)) in printRegImmShift()
223 SStream_concat0(O, ARM_AM_getShiftOpcStr(ShOpc)); in printRegImmShift()
227 …at_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].shift.type = (arm_shifter)ShOpc; in printRegImmShift()
229 …nsn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.type = (arm_shifter)ShOpc; in printRegImmShift()
232 if (ShOpc != ARM_AM_rrx) { in printRegImmShift()
951 ARM_AM_ShiftOpc ShOpc; in printSORegRegOperand() local
965 ShOpc = ARM_AM_getSORegShOp((unsigned int)MCOperand_getImm(MO3)); in printSORegRegOperand()
967 SStream_concat0(O, ARM_AM_getShiftOpcStr(ShOpc)); in printSORegRegOperand()
968 if (ShOpc == ARM_AM_rrx) in printSORegRegOperand()

123456