| /dports/editors/lazarus/lazarus/components/lazutils/ |
| H A D | graphtype.pp | 1447 Shift0, Shift1: Byte;
1506 Shift0 := SrcStartPos.Bit;
1507 Shift1 := 8 - Shift0;
1516 DstW1 := SrcPos[0] shr Shift0;
1528 DstW1 := SrcPos[0] shl Shift0;
|
| /dports/editors/lazarus-devel/lazarus-6df7e8756882f7d7f28f662011ee72f21746c580/components/lazutils/ |
| H A D | graphtype.pp | 1447 Shift0, Shift1: Byte;
1506 Shift0 := SrcStartPos.Bit;
1507 Shift1 := 8 - Shift0;
1516 DstW1 := SrcPos[0] shr Shift0;
1528 DstW1 := SrcPos[0] shl Shift0;
|
| /dports/editors/lazarus-qt5/lazarus/components/lazutils/ |
| H A D | graphtype.pp | 1447 Shift0, Shift1: Byte;
1506 Shift0 := SrcStartPos.Bit;
1507 Shift1 := 8 - Shift0;
1516 DstW1 := SrcPos[0] shr Shift0;
1528 DstW1 := SrcPos[0] shl Shift0;
|
| /dports/editors/lazarus-qt5-devel/lazarus-6df7e8756882f7d7f28f662011ee72f21746c580/components/lazutils/ |
| H A D | graphtype.pp | 1447 Shift0, Shift1: Byte;
1506 Shift0 := SrcStartPos.Bit;
1507 Shift1 := 8 - Shift0;
1516 DstW1 := SrcPos[0] shr Shift0;
1528 DstW1 := SrcPos[0] shl Shift0;
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 675 bool Shift0 = mi_match( in selectG_BUILD_VECTOR_TRUNC() local
684 if (Shift0 && Shift1) { in selectG_BUILD_VECTOR_TRUNC()
691 } else if (Shift0 && isZero(Src1, *MRI)) { in selectG_BUILD_VECTOR_TRUNC()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 675 bool Shift0 = mi_match( in selectG_BUILD_VECTOR_TRUNC() local
684 if (Shift0 && Shift1) { in selectG_BUILD_VECTOR_TRUNC()
691 } else if (Shift0 && isZero(Src1, *MRI)) { in selectG_BUILD_VECTOR_TRUNC()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 649 bool Shift0 = mi_match( in selectG_BUILD_VECTOR_TRUNC() local
658 if (Shift0 && Shift1) { in selectG_BUILD_VECTOR_TRUNC()
665 } else if (Shift0 && ConstSrc1 && ConstSrc1->Value == 0) { in selectG_BUILD_VECTOR_TRUNC()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 652 bool Shift0 = mi_match( in selectG_BUILD_VECTOR_TRUNC() local
659 if (Shift0 && Shift1) { in selectG_BUILD_VECTOR_TRUNC()
666 } else if (Shift0 && ConstSrc1 && ConstSrc1->Value == 0) { in selectG_BUILD_VECTOR_TRUNC()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 652 bool Shift0 = mi_match( in selectG_BUILD_VECTOR_TRUNC() local
659 if (Shift0 && Shift1) { in selectG_BUILD_VECTOR_TRUNC()
666 } else if (Shift0 && ConstSrc1 && ConstSrc1->Value == 0) { in selectG_BUILD_VECTOR_TRUNC()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 640 bool Shift0 = mi_match( in selectG_BUILD_VECTOR_TRUNC() local
647 if (Shift0 && Shift1) { in selectG_BUILD_VECTOR_TRUNC()
654 } else if (Shift0 && ConstSrc1 && ConstSrc1->Value == 0) { in selectG_BUILD_VECTOR_TRUNC()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 652 bool Shift0 = mi_match( in selectG_BUILD_VECTOR_TRUNC() local
659 if (Shift0 && Shift1) { in selectG_BUILD_VECTOR_TRUNC()
666 } else if (Shift0 && ConstSrc1 && ConstSrc1->Value == 0) { in selectG_BUILD_VECTOR_TRUNC()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 652 bool Shift0 = mi_match( in selectG_BUILD_VECTOR_TRUNC() local
659 if (Shift0 && Shift1) { in selectG_BUILD_VECTOR_TRUNC()
666 } else if (Shift0 && ConstSrc1 && ConstSrc1->Value == 0) { in selectG_BUILD_VECTOR_TRUNC()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 640 bool Shift0 = mi_match( in selectG_BUILD_VECTOR_TRUNC() local
647 if (Shift0 && Shift1) { in selectG_BUILD_VECTOR_TRUNC()
654 } else if (Shift0 && ConstSrc1 && ConstSrc1->Value == 0) { in selectG_BUILD_VECTOR_TRUNC()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 652 bool Shift0 = mi_match( in selectG_BUILD_VECTOR_TRUNC() local
659 if (Shift0 && Shift1) { in selectG_BUILD_VECTOR_TRUNC()
666 } else if (Shift0 && ConstSrc1 && ConstSrc1->Value == 0) { in selectG_BUILD_VECTOR_TRUNC()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 652 bool Shift0 = mi_match( in selectG_BUILD_VECTOR_TRUNC() local
659 if (Shift0 && Shift1) { in selectG_BUILD_VECTOR_TRUNC()
666 } else if (Shift0 && ConstSrc1 && ConstSrc1->Value == 0) { in selectG_BUILD_VECTOR_TRUNC()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 6002 SDValue Shift0 = N0.getOperand(0); in matchBSwapHWordOrAndAnd() local
6004 if (Shift0.getOpcode() != ISD::SHL || Shift1.getOpcode() != ISD::SRL) in matchBSwapHWordOrAndAnd()
6006 ConstantSDNode *ShiftAmt0 = isConstOrConstSplat(Shift0.getOperand(1)); in matchBSwapHWordOrAndAnd()
6012 if (Shift0.getOperand(0) != Shift1.getOperand(0)) in matchBSwapHWordOrAndAnd()
6016 SDValue BSwap = DAG.getNode(ISD::BSWAP, DL, VT, Shift0.getOperand(0)); in matchBSwapHWordOrAndAnd()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 5876 SDValue Shift0 = N0.getOperand(0); in matchBSwapHWordOrAndAnd() local
5878 if (Shift0.getOpcode() != ISD::SHL || Shift1.getOpcode() != ISD::SRL) in matchBSwapHWordOrAndAnd()
5880 ConstantSDNode *ShiftAmt0 = isConstOrConstSplat(Shift0.getOperand(1)); in matchBSwapHWordOrAndAnd()
5886 if (Shift0.getOperand(0) != Shift1.getOperand(0)) in matchBSwapHWordOrAndAnd()
5890 SDValue BSwap = DAG.getNode(ISD::BSWAP, DL, VT, Shift0.getOperand(0)); in matchBSwapHWordOrAndAnd()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 6219 SDValue Shift0 = N0.getOperand(0); in matchBSwapHWordOrAndAnd() local
6221 if (Shift0.getOpcode() != ISD::SHL || Shift1.getOpcode() != ISD::SRL) in matchBSwapHWordOrAndAnd()
6223 ConstantSDNode *ShiftAmt0 = isConstOrConstSplat(Shift0.getOperand(1)); in matchBSwapHWordOrAndAnd()
6229 if (Shift0.getOperand(0) != Shift1.getOperand(0)) in matchBSwapHWordOrAndAnd()
6233 SDValue BSwap = DAG.getNode(ISD::BSWAP, DL, VT, Shift0.getOperand(0)); in matchBSwapHWordOrAndAnd()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 6025 SDValue Shift0 = N0.getOperand(0); in matchBSwapHWordOrAndAnd() local
6027 if (Shift0.getOpcode() != ISD::SHL || Shift1.getOpcode() != ISD::SRL) in matchBSwapHWordOrAndAnd()
6029 ConstantSDNode *ShiftAmt0 = isConstOrConstSplat(Shift0.getOperand(1)); in matchBSwapHWordOrAndAnd()
6035 if (Shift0.getOperand(0) != Shift1.getOperand(0)) in matchBSwapHWordOrAndAnd()
6039 SDValue BSwap = DAG.getNode(ISD::BSWAP, DL, VT, Shift0.getOperand(0)); in matchBSwapHWordOrAndAnd()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 5783 SDValue Shift0 = N0.getOperand(0); in matchBSwapHWordOrAndAnd() local
5785 if (Shift0.getOpcode() != ISD::SHL || Shift1.getOpcode() != ISD::SRL) in matchBSwapHWordOrAndAnd()
5787 ConstantSDNode *ShiftAmt0 = isConstOrConstSplat(Shift0.getOperand(1)); in matchBSwapHWordOrAndAnd()
5793 if (Shift0.getOperand(0) != Shift1.getOperand(0)) in matchBSwapHWordOrAndAnd()
5797 SDValue BSwap = DAG.getNode(ISD::BSWAP, DL, VT, Shift0.getOperand(0)); in matchBSwapHWordOrAndAnd()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 6219 SDValue Shift0 = N0.getOperand(0); in matchBSwapHWordOrAndAnd() local
6221 if (Shift0.getOpcode() != ISD::SHL || Shift1.getOpcode() != ISD::SRL) in matchBSwapHWordOrAndAnd()
6223 ConstantSDNode *ShiftAmt0 = isConstOrConstSplat(Shift0.getOperand(1)); in matchBSwapHWordOrAndAnd()
6229 if (Shift0.getOperand(0) != Shift1.getOperand(0)) in matchBSwapHWordOrAndAnd()
6233 SDValue BSwap = DAG.getNode(ISD::BSWAP, DL, VT, Shift0.getOperand(0)); in matchBSwapHWordOrAndAnd()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 6219 SDValue Shift0 = N0.getOperand(0); in matchBSwapHWordOrAndAnd() local
6221 if (Shift0.getOpcode() != ISD::SHL || Shift1.getOpcode() != ISD::SRL) in matchBSwapHWordOrAndAnd()
6223 ConstantSDNode *ShiftAmt0 = isConstOrConstSplat(Shift0.getOperand(1)); in matchBSwapHWordOrAndAnd()
6229 if (Shift0.getOperand(0) != Shift1.getOperand(0)) in matchBSwapHWordOrAndAnd()
6233 SDValue BSwap = DAG.getNode(ISD::BSWAP, DL, VT, Shift0.getOperand(0)); in matchBSwapHWordOrAndAnd()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 6025 SDValue Shift0 = N0.getOperand(0); in matchBSwapHWordOrAndAnd() local
6027 if (Shift0.getOpcode() != ISD::SHL || Shift1.getOpcode() != ISD::SRL) in matchBSwapHWordOrAndAnd()
6029 ConstantSDNode *ShiftAmt0 = isConstOrConstSplat(Shift0.getOperand(1)); in matchBSwapHWordOrAndAnd()
6035 if (Shift0.getOperand(0) != Shift1.getOperand(0)) in matchBSwapHWordOrAndAnd()
6039 SDValue BSwap = DAG.getNode(ISD::BSWAP, DL, VT, Shift0.getOperand(0)); in matchBSwapHWordOrAndAnd()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 6219 SDValue Shift0 = N0.getOperand(0); in matchBSwapHWordOrAndAnd() local
6221 if (Shift0.getOpcode() != ISD::SHL || Shift1.getOpcode() != ISD::SRL) in matchBSwapHWordOrAndAnd()
6223 ConstantSDNode *ShiftAmt0 = isConstOrConstSplat(Shift0.getOperand(1)); in matchBSwapHWordOrAndAnd()
6229 if (Shift0.getOperand(0) != Shift1.getOperand(0)) in matchBSwapHWordOrAndAnd()
6233 SDValue BSwap = DAG.getNode(ISD::BSWAP, DL, VT, Shift0.getOperand(0)); in matchBSwapHWordOrAndAnd()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 6219 SDValue Shift0 = N0.getOperand(0); in matchBSwapHWordOrAndAnd() local
6221 if (Shift0.getOpcode() != ISD::SHL || Shift1.getOpcode() != ISD::SRL) in matchBSwapHWordOrAndAnd()
6223 ConstantSDNode *ShiftAmt0 = isConstOrConstSplat(Shift0.getOperand(1)); in matchBSwapHWordOrAndAnd()
6229 if (Shift0.getOperand(0) != Shift1.getOperand(0)) in matchBSwapHWordOrAndAnd()
6233 SDValue BSwap = DAG.getNode(ISD::BSWAP, DL, VT, Shift0.getOperand(0)); in matchBSwapHWordOrAndAnd()
|