| /dports/emulators/qemu42/qemu-4.2.1/hw/ide/ |
| H A D | sii3112.c | 21 #define SII3112_PCI(obj) OBJECT_CHECK(SiI3112PCIState, (obj), \
31 typedef struct SiI3112PCIState { struct
35 } SiI3112PCIState; typedef
44 SiI3112PCIState *d = opaque; in sii3112_reg_read()
137 SiI3112PCIState *d = opaque; in sii3112_reg_write()
215 static void sii3112_update_irq(SiI3112PCIState *s) in sii3112_update_irq()
227 SiI3112PCIState *s = opaque; in sii3112_set_irq()
241 SiI3112PCIState *s = SII3112_PCI(dev); in sii3112_reset()
252 SiI3112PCIState *d = SII3112_PCI(dev); in sii3112_pci_realize()
312 .instance_size = sizeof(SiI3112PCIState),
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| /dports/emulators/qemu-utils/qemu-4.2.1/hw/ide/ |
| H A D | sii3112.c | 21 #define SII3112_PCI(obj) OBJECT_CHECK(SiI3112PCIState, (obj), \
31 typedef struct SiI3112PCIState { struct
35 } SiI3112PCIState; argument
44 SiI3112PCIState *d = opaque; in sii3112_reg_read()
137 SiI3112PCIState *d = opaque; in sii3112_reg_write()
215 static void sii3112_update_irq(SiI3112PCIState *s) in sii3112_update_irq()
227 SiI3112PCIState *s = opaque; in sii3112_set_irq()
241 SiI3112PCIState *s = SII3112_PCI(dev); in sii3112_reset()
252 SiI3112PCIState *d = SII3112_PCI(dev); in sii3112_pci_realize()
312 .instance_size = sizeof(SiI3112PCIState),
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| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/ide/ |
| H A D | sii3112.c | 21 #define SII3112_PCI(obj) OBJECT_CHECK(SiI3112PCIState, (obj), \
31 typedef struct SiI3112PCIState { struct
35 } SiI3112PCIState; argument
44 SiI3112PCIState *d = opaque; in sii3112_reg_read()
137 SiI3112PCIState *d = opaque; in sii3112_reg_write()
215 static void sii3112_update_irq(SiI3112PCIState *s) in sii3112_update_irq()
227 SiI3112PCIState *s = opaque; in sii3112_set_irq()
241 SiI3112PCIState *s = SII3112_PCI(dev); in sii3112_reset()
252 SiI3112PCIState *d = SII3112_PCI(dev); in sii3112_pci_realize()
312 .instance_size = sizeof(SiI3112PCIState),
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/ide/ |
| H A D | sii3112.c | 21 #define SII3112_PCI(obj) OBJECT_CHECK(SiI3112PCIState, (obj), \
31 typedef struct SiI3112PCIState {
35 } SiI3112PCIState;
44 SiI3112PCIState *d = opaque; in dealloc()
137 SiI3112PCIState *d = opaque;
215 static void sii3112_update_irq(SiI3112PCIState *s)
227 SiI3112PCIState *s = opaque;
241 SiI3112PCIState *s = SII3112_PCI(dev);
252 SiI3112PCIState *d = SII3112_PCI(dev);
312 .instance_size = sizeof(SiI3112PCIState),
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/ide/ |
| H A D | sii3112.c | 20 #define SII3112_PCI(obj) OBJECT_CHECK(SiI3112PCIState, (obj), \
30 typedef struct SiI3112PCIState { struct
34 } SiI3112PCIState; argument
43 SiI3112PCIState *d = opaque; in sii3112_reg_read()
152 SiI3112PCIState *d = opaque; in sii3112_reg_write()
250 static void sii3112_update_irq(SiI3112PCIState *s) in sii3112_update_irq()
262 SiI3112PCIState *s = opaque; in sii3112_set_irq()
276 SiI3112PCIState *s = opaque; in sii3112_reset()
287 SiI3112PCIState *d = SII3112_PCI(dev); in sii3112_pci_realize()
347 .instance_size = sizeof(SiI3112PCIState),
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| /dports/emulators/qemu/qemu-6.2.0/hw/ide/ |
| H A D | sii3112.c | 22 OBJECT_DECLARE_SIMPLE_TYPE(SiI3112PCIState, SII3112_PCI)
31 struct SiI3112PCIState { struct
44 SiI3112PCIState *d = opaque; in sii3112_reg_read() argument
138 SiI3112PCIState *d = opaque; in sii3112_reg_write()
216 static void sii3112_update_irq(SiI3112PCIState *s) in sii3112_update_irq()
228 SiI3112PCIState *s = opaque; in sii3112_set_irq()
242 SiI3112PCIState *s = SII3112_PCI(dev); in sii3112_reset()
253 SiI3112PCIState *d = SII3112_PCI(dev); in sii3112_pci_realize()
313 .instance_size = sizeof(SiI3112PCIState),
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| /dports/emulators/qemu60/qemu-6.0.0/hw/ide/ |
| H A D | sii3112.c | 22 OBJECT_DECLARE_SIMPLE_TYPE(SiI3112PCIState, SII3112_PCI)
31 struct SiI3112PCIState { struct
44 SiI3112PCIState *d = opaque; in sii3112_reg_read() argument
138 SiI3112PCIState *d = opaque; in sii3112_reg_write()
216 static void sii3112_update_irq(SiI3112PCIState *s) in sii3112_update_irq()
228 SiI3112PCIState *s = opaque; in sii3112_set_irq()
242 SiI3112PCIState *s = SII3112_PCI(dev); in sii3112_reset()
253 SiI3112PCIState *d = SII3112_PCI(dev); in sii3112_pci_realize()
313 .instance_size = sizeof(SiI3112PCIState),
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| /dports/emulators/qemu5/qemu-5.2.0/hw/ide/ |
| H A D | sii3112.c | 22 OBJECT_DECLARE_SIMPLE_TYPE(SiI3112PCIState, SII3112_PCI)
31 struct SiI3112PCIState { struct
44 SiI3112PCIState *d = opaque; in sii3112_reg_read() argument
138 SiI3112PCIState *d = opaque; in sii3112_reg_write()
216 static void sii3112_update_irq(SiI3112PCIState *s) in sii3112_update_irq()
228 SiI3112PCIState *s = opaque; in sii3112_set_irq()
242 SiI3112PCIState *s = SII3112_PCI(dev); in sii3112_reset()
253 SiI3112PCIState *d = SII3112_PCI(dev); in sii3112_pci_realize()
313 .instance_size = sizeof(SiI3112PCIState),
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| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/ide/ |
| H A D | sii3112.c | 22 OBJECT_DECLARE_SIMPLE_TYPE(SiI3112PCIState, SII3112_PCI)
31 struct SiI3112PCIState { struct
44 SiI3112PCIState *d = opaque; in sii3112_reg_read() argument
138 SiI3112PCIState *d = opaque; in sii3112_reg_write()
216 static void sii3112_update_irq(SiI3112PCIState *s) in sii3112_update_irq()
228 SiI3112PCIState *s = opaque; in sii3112_set_irq()
242 SiI3112PCIState *s = SII3112_PCI(dev); in sii3112_reset()
253 SiI3112PCIState *d = SII3112_PCI(dev); in sii3112_pci_realize()
313 .instance_size = sizeof(SiI3112PCIState),
|