| /dports/games/0ad/0ad-0.0.23b-alpha/source/tools/atlas/GameInterface/ |
| H A D | SimState.cpp | 25 SimState* SimState::Freeze() in Freeze()
27 SimState* simState = new SimState(); in Freeze()
38 void SimState::Thaw() in Thaw()
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| H A D | SimState.h | 23 class SimState
26 static SimState* Freeze();
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| /dports/security/py-angr/angr-9.0.5405/tests/ |
| H A D | test_ptmalloc.py | 2 from angr import SimState, SimHeapPTMalloc
28 … s = SimState(arch=arch, plugins={'heap': SimHeapPTMalloc(heap_base=0xd0000000, heap_size=0x1000)})
43 … s = SimState(arch=arch, plugins={'heap': SimHeapPTMalloc(heap_base=0xd0000000, heap_size=0x1000)})
59 … s = SimState(arch=arch, plugins={'heap': SimHeapPTMalloc(heap_base=0xd0000000, heap_size=0x1000)})
77 … s = SimState(arch=arch, plugins={'heap': SimHeapPTMalloc(heap_base=0xd0000000, heap_size=0x1000)})
96 … s = SimState(arch=arch, plugins={'heap': SimHeapPTMalloc(heap_base=0xd0000000, heap_size=0x1000)})
108 … s = SimState(arch=arch, plugins={'heap': SimHeapPTMalloc(heap_base=0xd0000000, heap_size=0x1000)})
120 … s = SimState(arch=arch, plugins={'heap': SimHeapPTMalloc(heap_base=0xd0000000, heap_size=0x1000)})
133 … s = SimState(arch=arch, plugins={'heap': SimHeapPTMalloc(heap_base=0xd0000000, heap_size=0x1000)})
146 … s = SimState(arch=arch, plugins={'heap': SimHeapPTMalloc(heap_base=0xd0000000, heap_size=0x1000)})
[all …]
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| H A D | test_lseek.py | 8 from angr import SimState, SimPosixError, SimFile
24 state = SimState(arch="AMD64", mode="symbolic")
61 state = SimState(arch="AMD64", mode="symbolic")
89 state = SimState(arch="AMD64", mode="symbolic")
116 state = SimState(arch="AMD64", mode="symbolic")
142 state = SimState(arch="AMD64", mode="symbolic")
157 state = SimState(arch="AMD64", mode="symbolic")
|
| H A D | test_string.py | 5 from angr import SimState, SIM_LIBRARIES
34 s = SimState(arch='AMD64', mode='symbolic')
42 s = SimState(arch="AMD64", mode="symbolic")
75 s = SimState(arch="AMD64", mode="symbolic")
99 s = SimState(arch="AMD64", mode="symbolic")
133 s = SimState(arch="AMD64", mode="symbolic")
156 s = SimState(arch="AMD64", mode="symbolic")
178 s = SimState(arch="AMD64", mode="symbolic")
205 s = SimState(arch="AMD64", mode="symbolic")
224 s = SimState(arch="AMD64", mode="symbolic")
[all …]
|
| H A D | test_memview.py | 6 from angr import SimState
10 s = SimState(arch="AMD64")
32 s = SimState(arch="AMD64")
52 s = SimState(arch="AMD64")
76 s = SimState(arch="AMD64")
89 s = SimState(arch='AMD64')
|
| H A D | test_stack_alignment.py | 5 from angr import SimState
18 st = SimState(arch=arch)
33 st = SimState(arch=arch)
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| H A D | test_posix.py | 6 from angr import SimState, SimFile
10 state = SimState(arch="AMD64", mode='symbolic')
18 state = SimState(arch="AMD64", mode='symbolic')
37 state = SimState(arch="AMD64", mode='symbolic')
|
| H A D | test_memory.py | 256 s = SimState(mode='static',
378 s = SimState(mode='static',
425 s = SimState(arch='AMD64')
439 s = SimState(arch='AMD64')
448 s = SimState(arch='AMD64')
456 s = SimState(arch='AMD64')
464 s = SimState(arch='AMD64')
521 s = SimState(arch='AMD64')
526 s = SimState(arch='AMD64')
530 s = SimState(arch='AMD64')
[all …]
|
| H A D | test_inspect.py | 9 from angr import SimState, BP_AFTER, BP_BEFORE, SIM_PROCEDURES, concretization_strategies
54 s = SimState(arch="AMD64", mode="symbolic")
103 s = SimState(arch="AMD64", mode="symbolic")
126 s = SimState(arch="AMD64", mode="symbolic")
157 s = SimState(arch="AMD64", mode="symbolic")
188 s = SimState(arch='AMD64')
201 s = SimState(arch='AMD64')
226 s = SimState(arch='AMD64')
|
| H A D | test_pwrite_pread.py | 4 from angr import SimState, SimFile, SIM_PROCEDURES
10 state = SimState(arch="AMD64", mode='symbolic')
33 state = SimState(arch="AMD64", mode='symbolic')
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| H A D | test_state.py | 9 from angr import SimState
16 s = SimState(arch='AMD64')
35 a = SimState(arch='AMD64', mode='symbolic')
93 a = SimState(arch='AMD64', mode='symbolic')
108 a = SimState(arch='AMD64', mode='symbolic')
116 a = SimState(arch='AMD64', mode='static')
137 a = SimState(arch='AMD64', mode='symbolic')
206 s = SimState(arch="AMD64")
217 s = SimState(arch="AMD64")
|
| H A D | test_mmap.py | 5 from angr import SimState
11 state = SimState(arch="AMD64", mode="symbolic")
|
| H A D | test_files.py | 10 s = angr.SimState(arch='AMD64')
16 s = angr.SimState(arch='AMD64')
24 s = angr.SimState(arch='AMD64', mode="tracing")
|
| H A D | test_actions.py | 2 from angr import SimState, SIM_PROCEDURES
9 s = SimState(arch='AMD64')
|
| H A D | test_cc.py | 2 from angr import SimState, SIM_PROCEDURES
26 s = SimState(arch=arch)
|
| /dports/security/py-angr/angr-9.0.5405/angr/state_plugins/ |
| H A D | plugin.py | 20 self.state = cast(angr.SimState, None) # type: angr.SimState
113 from angr.sim_state import SimState
114 SimState.register_default(name, xtr)
122 from angr.sim_state import SimState
123 SimState.register_default(name, cls, xtr if xtr is not None else 'default')
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| H A D | loop_data.py | 88 from angr.sim_state import SimState
89 SimState.register_default('loop_data', SimStateLoopData)
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| /dports/security/py-angr/angr-9.0.5405/angr/storage/memory_mixins/ |
| H A D | __init__.py | 300 from angr.sim_state import SimState
301 SimState.register_default('sym_memory', DefaultMemory)
302 SimState.register_default('fast_memory', FastMemory)
303 SimState.register_default('abs_memory', AbstractMemory)
304 SimState.register_default('keyvalue_memory', KeyValueMemory)
305 SimState.register_default('javavm_memory', JavaVmMemory)
|
| /dports/security/py-angr/angr-9.0.5405/angr/ |
| H A D | factory.py | 6 from .sim_state import SimState
79 def entry_state(self, **kwargs) -> SimState:
168 …def simulation_manager(self, thing: Optional[Union[List[SimState], SimState]]=None, **kwargs) -> '… argument
187 if any(not isinstance(val, SimState) for val in thing):
189 elif isinstance(thing, SimState):
|
| /dports/games/fs2open/fs2open.github.com-release_21_4_1/lib/antlr4-cpp-runtime/runtime/src/atn/ |
| H A D | LexerATNSimulator.h | 18 class SimState {
20 virtual ~SimState();
34 SimState() { in SimState() function
82 SimState _prevAccept;
|
| /dports/sysutils/istio/istio-1.6.7/vendor/github.com/antlr/antlr4/runtime/Cpp/runtime/src/atn/ |
| H A D | LexerATNSimulator.h | 18 class SimState {
20 virtual ~SimState();
34 SimState() { in SimState() function
82 SimState _prevAccept;
|
| /dports/devel/libantlr4/libantlr4-4.9.3/runtime/src/atn/ |
| H A D | LexerATNSimulator.h | 20 class SimState {
22 virtual ~SimState();
36 SimState() { in SimState() function
91 SimState _prevAccept;
|
| /dports/www/node10/node-v10.24.1/deps/v8/third_party/antlr4/runtime/Cpp/runtime/src/atn/ |
| H A D | LexerATNSimulator.h | 18 class SimState {
20 virtual ~SimState();
34 SimState() { InitializeInstanceFields(); } in SimState() function
81 SimState _prevAccept;
|
| /dports/sysutils/istio/istio-1.6.7/vendor/github.com/antlr/antlr4/runtime/Go/antlr/ |
| H A D | lexer_atn_simulator.go | 43 prevAccept *SimState
246 func (l *LexerATNSimulator) failOrAccept(prevAccept *SimState, input CharStream, reach ATNConfigSet…
516 func (l *LexerATNSimulator) captureSimState(settings *SimState, input CharStream, dfaState *DFAStat…
636 func resetSimState(sim *SimState) { argument
643 type SimState struct { struct
650 func NewSimState() *SimState {
651 s := new(SimState)
656 func (s *SimState) reset() { argument
|