| /dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/PeiDxeSmmSpiAccessPrivateLib/ |
| H A D | SpiAccessPrivateLib.c | 27 UINT64 SpiBaseAddress;
28 SpiBaseAddress = SpiPciCfgBase ();
30 ASSERT ((PciSegmentRead8 (SpiBaseAddress + R_SPI_CFG_BC) & B_SPI_CFG_BC_LE) == 0);
32 PciSegmentAnd8 (SpiBaseAddress + R_SPI_CFG_BC, (UINT8) ~(B_SPI_CFG_BC_EISS));
48 UINT64 SpiBaseAddress; in SpiProtocolConstructor()
55 SpiBaseAddress = SpiPciCfgBase (); in SpiProtocolConstructor()
100 PciSegmentOr8 (SpiBaseAddress + R_SPI_CFG_BC, SpiData8); in SpiProtocolConstructor()
103 PcdGet64 (PcdPciExpressBaseAddress) + SpiBaseAddress + R_SPI_CFG_BC, in SpiProtocolConstructor()
105 (VOID *) (UINTN) (PcdGet64 (PcdPciExpressBaseAddress) + SpiBaseAddress + R_SPI_CFG_BC) in SpiProtocolConstructor()
110 SpiData8 = PciSegmentRead8 (SpiBaseAddress + R_SPI_CFG_BC); in SpiProtocolConstructor()
[all …]
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| /dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/ |
| H A D | PchSpi.c | 173 UINTN SpiBaseAddress; in DisableBiosWriteProtect() local
175 SpiBaseAddress = MmPciBase ( in DisableBiosWriteProtect()
183 SpiBaseAddress + R_PCH_SPI_BC + 1, in DisableBiosWriteProtect()
191 SpiBaseAddress + R_PCH_SPI_BC, in DisableBiosWriteProtect()
208 if ((MmioRead8 (SpiBaseAddress + R_PCH_SPI_BC) & B_PCH_SPI_BC_EISS) != 0) { in DisableBiosWriteProtect()
226 UINTN SpiBaseAddress; in EnableBiosWriteProtect() local
228 SpiBaseAddress = MmPciBase ( in EnableBiosWriteProtect()
238 SpiBaseAddress + R_PCH_SPI_BC, in EnableBiosWriteProtect()
245 if (((MmioRead8 (SpiBaseAddress + R_PCH_SPI_BC)) & B_PCH_SPI_BC_EISS) == B_PCH_SPI_BC_EISS) { in EnableBiosWriteProtect()
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| /dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/ |
| H A D | PeiSpiLib.c | 156 UINT64 SpiBaseAddress; in DisableBiosWriteProtect() local
158 SpiBaseAddress = PCI_SEGMENT_LIB_ADDRESS ( in DisableBiosWriteProtect()
168 PciSegmentAnd8 (SpiBaseAddress + R_PCH_SPI_BC, (UINT8) ~B_PCH_SPI_BC_EISS); in DisableBiosWriteProtect()
174 SpiBaseAddress + R_PCH_SPI_BC + 1, in DisableBiosWriteProtect()
183 SpiBaseAddress + R_PCH_SPI_BC, in DisableBiosWriteProtect()
187 ASSERT ((PciSegmentRead8 (SpiBaseAddress + R_PCH_SPI_BC) & B_PCH_SPI_BC_EISS) == 0); in DisableBiosWriteProtect()
202 UINT64 SpiBaseAddress; in EnableBiosWriteProtect() local
204 SpiBaseAddress = PCI_SEGMENT_LIB_ADDRESS ( in EnableBiosWriteProtect()
216 SpiBaseAddress + R_PCH_SPI_BC, in EnableBiosWriteProtect()
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| /dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/ |
| H A D | Spi.c | 188 UINT64 SpiBaseAddress; in DisableBiosWriteProtect() local
190 SpiBaseAddress = SpiPciCfgBase (); in DisableBiosWriteProtect()
194 SpiBaseAddress + R_SPI_CFG_BC + 1, in DisableBiosWriteProtect()
202 SpiBaseAddress + R_SPI_CFG_BC, in DisableBiosWriteProtect()
219 if ((PciSegmentRead8 (SpiBaseAddress + R_SPI_CFG_BC) & B_SPI_CFG_BC_EISS) != 0) { in DisableBiosWriteProtect()
235 UINT64 SpiBaseAddress; in EnableBiosWriteProtect() local
237 SpiBaseAddress = SpiPciCfgBase (); in EnableBiosWriteProtect()
243 SpiBaseAddress + R_SPI_CFG_BC, in EnableBiosWriteProtect()
250 …if (((PciSegmentRead8 (SpiBaseAddress + R_SPI_CFG_BC)) & B_SPI_CFG_BC_EISS) == B_SPI_CFG_BC_EISS) { in EnableBiosWriteProtect()
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| /dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/ |
| H A D | PchSpi.c | 188 UINT64 SpiBaseAddress; in DisableBiosWriteProtect() local
190 SpiBaseAddress = PCI_SEGMENT_LIB_ADDRESS ( in DisableBiosWriteProtect()
200 SpiBaseAddress + R_SPI_CFG_BC + 1, in DisableBiosWriteProtect()
208 SpiBaseAddress + R_SPI_CFG_BC, in DisableBiosWriteProtect()
225 if ((PciSegmentRead8 (SpiBaseAddress + R_SPI_CFG_BC) & B_SPI_CFG_BC_EISS) != 0) { in DisableBiosWriteProtect()
243 UINT64 SpiBaseAddress; in EnableBiosWriteProtect() local
245 SpiBaseAddress = PCI_SEGMENT_LIB_ADDRESS ( in EnableBiosWriteProtect()
257 SpiBaseAddress + R_SPI_CFG_BC, in EnableBiosWriteProtect()
264 …if (((PciSegmentRead8 (SpiBaseAddress + R_SPI_CFG_BC)) & B_SPI_CFG_BC_EISS) == B_SPI_CFG_BC_EISS) { in EnableBiosWriteProtect()
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| /dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/ |
| H A D | PchSpi.c | 153 UINT64 SpiBaseAddress; in DisableBiosWriteProtect() local
155 SpiBaseAddress = PCI_SEGMENT_LIB_ADDRESS ( in DisableBiosWriteProtect()
162 if ((PciSegmentRead8 (SpiBaseAddress + R_SPI_CFG_BC) & B_SPI_CFG_BC_EISS) != 0) { in DisableBiosWriteProtect()
169 SpiBaseAddress + R_SPI_CFG_BC, in DisableBiosWriteProtect()
187 UINT64 SpiBaseAddress; in EnableBiosWriteProtect() local
189 SpiBaseAddress = PCI_SEGMENT_LIB_ADDRESS ( in EnableBiosWriteProtect()
200 SpiBaseAddress + R_SPI_CFG_BC, in EnableBiosWriteProtect()
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| /dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiDxeSmmBiosLockLib/ |
| H A D | BiosLockLib.c | 40 UINT64 SpiBaseAddress; in BiosLockEnable() local
49 SpiBaseAddress = PCI_SEGMENT_LIB_ADDRESS ( in BiosLockEnable()
84 PciSegmentOr8 (SpiBaseAddress + R_SPI_CFG_BC, B_SPI_CFG_BC_EISS | B_SPI_CFG_BC_LE); in BiosLockEnable()
87 PcdGet64 (PcdPciExpressBaseAddress) + SpiBaseAddress + R_SPI_CFG_BC, in BiosLockEnable()
89 (VOID *) (UINTN) (PcdGet64 (PcdPciExpressBaseAddress) + SpiBaseAddress + R_SPI_CFG_BC) in BiosLockEnable()
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| /dports/sysutils/edk2/edk2-platforms-89f6170d/Platform/Intel/QuarkPlatformPkg/Library/PlatformHelperLib/ |
| H A D | PlatformHelperLib.c | 136 IN CONST UINT32 SpiBaseAddress, in PlatformIsSpiRangeProtected() argument
151 Limit = SpiBaseAddress + (Length - 1); in PlatformIsSpiRangeProtected()
157 if (SpiBaseAddress >= ProtectedBase && Limit <= ProtectedLimit) { in PlatformIsSpiRangeProtected()
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| /dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/ |
| H A D | SpiCommon.c | 340 UINT64 SpiBaseAddress;
363 SpiBaseAddress = SpiInstance->PchSpiBase;
380 BiosCtlSave = PciSegmentRead8 (SpiBaseAddress + R_SPI_CFG_BC) & B_SPI_CFG_BC_SRC;
392 SpiBaseAddress + R_SPI_CFG_BC,
610 SpiBaseAddress + R_SPI_CFG_BC,
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| /dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/ |
| H A D | SpiCommon.c | 744 UINTN SpiBaseAddress; in SendSpiCmd() local
756 SpiBaseAddress = SpiInstance->PchSpiBase; in SendSpiCmd()
773 BiosCtlSave = MmioRead8 (SpiBaseAddress + R_PCH_SPI_BC) & B_PCH_SPI_BC_SRC; in SendSpiCmd()
785 SpiBaseAddress + R_PCH_SPI_BC, in SendSpiCmd()
991 SpiBaseAddress + R_PCH_SPI_BC, in SendSpiCmd()
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| /dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/ |
| H A D | SpiCommon.c | 331 UINT64 SpiBaseAddress; in SendSpiCmd() local
354 SpiBaseAddress = SpiInstance->PchSpiBase; in SendSpiCmd()
371 BiosCtlSave = PciSegmentRead8 (SpiBaseAddress + R_SPI_CFG_BC) & B_SPI_CFG_BC_SRC; in SendSpiCmd()
383 SpiBaseAddress + R_SPI_CFG_BC, in SendSpiCmd()
600 SpiBaseAddress + R_SPI_CFG_BC, in SendSpiCmd()
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| /dports/sysutils/edk2/edk2-platforms-89f6170d/Platform/Intel/QuarkPlatformPkg/Include/Library/ |
| H A D | PlatformHelperLib.h | 126 IN CONST UINT32 SpiBaseAddress,
|