/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/MSP430/ |
H A D | MSP430InstrFormats.td | 34 def SrcImm : SourceMode<3>; 102 : IForm8<opcode, DstReg, SrcImm, Size4Bytes, outs, ins, asmstr, pattern>; 114 : IForm8<opcode, DstMem, SrcImm, Size6Bytes, outs, ins, asmstr, pattern>; 131 : IForm16<opcode, DstReg, SrcImm, Size4Bytes, outs, ins, asmstr, pattern>; 143 : IForm16<opcode, DstMem, SrcImm, Size6Bytes, outs, ins, asmstr, pattern>; 177 : IIForm8<opcode, SrcImm, Size4Bytes, outs, ins, asmstr, pattern>; 194 : IIForm16<opcode, SrcImm, Size4Bytes, outs, ins, asmstr, pattern>;
|
/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AMDGPU/ |
H A D | SIShrinkInstructions.cpp | 229 MachineOperand *SrcImm = Src1; in shrinkScalarLogicOp() local 231 if (SrcImm->isImm() && in shrinkScalarLogicOp() 232 !AMDGPU::isInlinableLiteral32(SrcImm->getImm(), ST.hasInv2PiInlineImm())) { in shrinkScalarLogicOp() 233 uint32_t Imm = static_cast<uint32_t>(SrcImm->getImm()); in shrinkScalarLogicOp() 262 SrcImm == Src0) { in shrinkScalarLogicOp() 282 SrcImm->setImm(NewImm); in shrinkScalarLogicOp()
|
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430InstrFormats.td | 21 def SrcImm : SourceMode<3>; // i 75 : IForm8<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 131 : IForm8<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 202 : IForm16<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 258 : IForm16<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 350 : IIForm8<opcode, SrcImm, 4, outs, ins, asmstr, pattern> { 396 : IIForm16<opcode, SrcImm, 4, outs, ins, asmstr, pattern> {
|
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/MSP430/ |
H A D | MSP430InstrFormats.td | 21 def SrcImm : SourceMode<3>; // i 75 : IForm8<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 131 : IForm8<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 202 : IForm16<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 258 : IForm16<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 350 : IIForm8<opcode, SrcImm, 4, outs, ins, asmstr, pattern> { 396 : IIForm16<opcode, SrcImm, 4, outs, ins, asmstr, pattern> {
|
/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/MSP430/ |
H A D | MSP430InstrFormats.td | 21 def SrcImm : SourceMode<3>; // i 75 : IForm8<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 131 : IForm8<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 202 : IForm16<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 258 : IForm16<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 350 : IIForm8<opcode, SrcImm, 4, outs, ins, asmstr, pattern> { 396 : IIForm16<opcode, SrcImm, 4, outs, ins, asmstr, pattern> {
|
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/MSP430/ |
H A D | MSP430InstrFormats.td | 21 def SrcImm : SourceMode<3>; // i 75 : IForm8<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 131 : IForm8<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 202 : IForm16<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 258 : IForm16<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 350 : IIForm8<opcode, SrcImm, 4, outs, ins, asmstr, pattern> { 396 : IIForm16<opcode, SrcImm, 4, outs, ins, asmstr, pattern> {
|
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/MSP430/ |
H A D | MSP430InstrFormats.td | 21 def SrcImm : SourceMode<3>; // i 75 : IForm8<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 131 : IForm8<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 202 : IForm16<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 258 : IForm16<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 350 : IIForm8<opcode, SrcImm, 4, outs, ins, asmstr, pattern> { 396 : IIForm16<opcode, SrcImm, 4, outs, ins, asmstr, pattern> {
|
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/MSP430/ |
H A D | MSP430InstrFormats.td | 21 def SrcImm : SourceMode<3>; // i 75 : IForm8<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 131 : IForm8<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 202 : IForm16<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 258 : IForm16<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 350 : IIForm8<opcode, SrcImm, 4, outs, ins, asmstr, pattern> { 396 : IIForm16<opcode, SrcImm, 4, outs, ins, asmstr, pattern> {
|
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/MSP430/ |
H A D | MSP430InstrFormats.td | 21 def SrcImm : SourceMode<3>; // i 75 : IForm8<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 131 : IForm8<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 202 : IForm16<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 258 : IForm16<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 350 : IIForm8<opcode, SrcImm, 4, outs, ins, asmstr, pattern> { 396 : IIForm16<opcode, SrcImm, 4, outs, ins, asmstr, pattern> {
|
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430InstrFormats.td | 21 def SrcImm : SourceMode<3>; // i 75 : IForm8<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 131 : IForm8<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 202 : IForm16<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 258 : IForm16<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 350 : IIForm8<opcode, SrcImm, 4, outs, ins, asmstr, pattern> { 396 : IIForm16<opcode, SrcImm, 4, outs, ins, asmstr, pattern> {
|
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
H A D | MSP430InstrFormats.td | 21 def SrcImm : SourceMode<3>; // i 75 : IForm8<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 131 : IForm8<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 202 : IForm16<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 258 : IForm16<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 350 : IIForm8<opcode, SrcImm, 4, outs, ins, asmstr, pattern> { 396 : IIForm16<opcode, SrcImm, 4, outs, ins, asmstr, pattern> {
|
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/MSP430/ |
H A D | MSP430InstrFormats.td | 21 def SrcImm : SourceMode<3>; // i 75 : IForm8<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 131 : IForm8<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 202 : IForm16<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 258 : IForm16<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 350 : IIForm8<opcode, SrcImm, 4, outs, ins, asmstr, pattern> { 396 : IIForm16<opcode, SrcImm, 4, outs, ins, asmstr, pattern> {
|
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/MSP430/ |
H A D | MSP430InstrFormats.td | 21 def SrcImm : SourceMode<3>; // i 75 : IForm8<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 131 : IForm8<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 202 : IForm16<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 258 : IForm16<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 350 : IIForm8<opcode, SrcImm, 4, outs, ins, asmstr, pattern> { 396 : IIForm16<opcode, SrcImm, 4, outs, ins, asmstr, pattern> {
|
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/MSP430/ |
H A D | MSP430InstrFormats.td | 21 def SrcImm : SourceMode<3>; // i 75 : IForm8<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 131 : IForm8<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 202 : IForm16<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 258 : IForm16<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 350 : IIForm8<opcode, SrcImm, 4, outs, ins, asmstr, pattern> { 396 : IIForm16<opcode, SrcImm, 4, outs, ins, asmstr, pattern> {
|
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/MSP430/ |
H A D | MSP430InstrFormats.td | 21 def SrcImm : SourceMode<3>; // i 75 : IForm8<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 131 : IForm8<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 202 : IForm16<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 258 : IForm16<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 350 : IIForm8<opcode, SrcImm, 4, outs, ins, asmstr, pattern> { 396 : IIForm16<opcode, SrcImm, 4, outs, ins, asmstr, pattern> {
|
/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/MSP430/ |
H A D | MSP430InstrFormats.td | 21 def SrcImm : SourceMode<3>; // i 75 : IForm8<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 131 : IForm8<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 202 : IForm16<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 258 : IForm16<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 350 : IIForm8<opcode, SrcImm, 4, outs, ins, asmstr, pattern> { 396 : IIForm16<opcode, SrcImm, 4, outs, ins, asmstr, pattern> {
|
/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/MSP430/ |
H A D | MSP430InstrFormats.td | 22 def SrcImm : SourceMode<3>; // i 76 : IForm8<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 132 : IForm8<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 203 : IForm16<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 259 : IForm16<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 351 : IIForm8<opcode, SrcImm, 4, outs, ins, asmstr, pattern> { 397 : IIForm16<opcode, SrcImm, 4, outs, ins, asmstr, pattern> {
|
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/MSP430/ |
H A D | MSP430InstrFormats.td | 21 def SrcImm : SourceMode<3>; // i 75 : IForm8<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 131 : IForm8<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 202 : IForm16<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> { 258 : IForm16<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> { 350 : IIForm8<opcode, SrcImm, 4, outs, ins, asmstr, pattern> { 396 : IIForm16<opcode, SrcImm, 4, outs, ins, asmstr, pattern> {
|
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AMDGPU/ |
H A D | SIShrinkInstructions.cpp | 329 MachineOperand *SrcImm = Src1; in shrinkScalarLogicOp() local 331 if (!SrcImm->isImm() || in shrinkScalarLogicOp() 332 AMDGPU::isInlinableLiteral32(SrcImm->getImm(), ST.hasInv2PiInlineImm())) in shrinkScalarLogicOp() 335 uint32_t Imm = static_cast<uint32_t>(SrcImm->getImm()); in shrinkScalarLogicOp() 364 SrcImm == Src0) { in shrinkScalarLogicOp() 385 SrcImm->setImm(NewImm); in shrinkScalarLogicOp()
|
/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AMDGPU/ |
H A D | SIShrinkInstructions.cpp | 324 MachineOperand *SrcImm = Src1; in shrinkScalarLogicOp() local 326 if (SrcImm->isImm() && in shrinkScalarLogicOp() 327 !AMDGPU::isInlinableLiteral32(SrcImm->getImm(), ST.hasInv2PiInlineImm())) { in shrinkScalarLogicOp() 328 uint32_t Imm = static_cast<uint32_t>(SrcImm->getImm()); in shrinkScalarLogicOp() 357 SrcImm == Src0) { in shrinkScalarLogicOp() 378 SrcImm->setImm(NewImm); in shrinkScalarLogicOp()
|
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AMDGPU/ |
H A D | SIShrinkInstructions.cpp | 329 MachineOperand *SrcImm = Src1; in shrinkScalarLogicOp() local 331 if (!SrcImm->isImm() || in shrinkScalarLogicOp() 332 AMDGPU::isInlinableLiteral32(SrcImm->getImm(), ST.hasInv2PiInlineImm())) in shrinkScalarLogicOp() 335 uint32_t Imm = static_cast<uint32_t>(SrcImm->getImm()); in shrinkScalarLogicOp() 364 SrcImm == Src0) { in shrinkScalarLogicOp() 385 SrcImm->setImm(NewImm); in shrinkScalarLogicOp()
|
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
H A D | SIShrinkInstructions.cpp | 324 MachineOperand *SrcImm = Src1; in shrinkScalarLogicOp() local 326 if (SrcImm->isImm() && in shrinkScalarLogicOp() 327 !AMDGPU::isInlinableLiteral32(SrcImm->getImm(), ST.hasInv2PiInlineImm())) { in shrinkScalarLogicOp() 328 uint32_t Imm = static_cast<uint32_t>(SrcImm->getImm()); in shrinkScalarLogicOp() 357 SrcImm == Src0) { in shrinkScalarLogicOp() 378 SrcImm->setImm(NewImm); in shrinkScalarLogicOp()
|
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIShrinkInstructions.cpp | 324 MachineOperand *SrcImm = Src1; in shrinkScalarLogicOp() local 326 if (SrcImm->isImm() && in shrinkScalarLogicOp() 327 !AMDGPU::isInlinableLiteral32(SrcImm->getImm(), ST.hasInv2PiInlineImm())) { in shrinkScalarLogicOp() 328 uint32_t Imm = static_cast<uint32_t>(SrcImm->getImm()); in shrinkScalarLogicOp() 357 SrcImm == Src0) { in shrinkScalarLogicOp() 378 SrcImm->setImm(NewImm); in shrinkScalarLogicOp()
|
/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AMDGPU/ |
H A D | SIShrinkInstructions.cpp | 324 MachineOperand *SrcImm = Src1; in shrinkScalarLogicOp() local 326 if (SrcImm->isImm() && in shrinkScalarLogicOp() 327 !AMDGPU::isInlinableLiteral32(SrcImm->getImm(), ST.hasInv2PiInlineImm())) { in shrinkScalarLogicOp() 328 uint32_t Imm = static_cast<uint32_t>(SrcImm->getImm()); in shrinkScalarLogicOp() 357 SrcImm == Src0) { in shrinkScalarLogicOp() 379 SrcImm->setImm(NewImm); in shrinkScalarLogicOp()
|
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AMDGPU/ |
H A D | SIShrinkInstructions.cpp | 325 MachineOperand *SrcImm = Src1; in shrinkScalarLogicOp() local 327 if (!SrcImm->isImm() || in shrinkScalarLogicOp() 328 AMDGPU::isInlinableLiteral32(SrcImm->getImm(), ST.hasInv2PiInlineImm())) in shrinkScalarLogicOp() 331 uint32_t Imm = static_cast<uint32_t>(SrcImm->getImm()); in shrinkScalarLogicOp() 360 SrcImm == Src0) { in shrinkScalarLogicOp() 385 SrcImm->setImm(NewImm); in shrinkScalarLogicOp()
|