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Searched refs:StackPtrReg (Results 1 – 25 of 48) sorted by relevance

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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp696 Register StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitPrologue() local
774 StackPtrReg, in emitPrologue()
791 FuncInfo->getScratchRSrcReg(), StackPtrReg, in emitPrologue()
808 FuncInfo->getScratchRSrcReg(), StackPtrReg, in emitPrologue()
879 .addReg(StackPtrReg) in emitPrologue()
889 .addReg(StackPtrReg) in emitPrologue()
899 .addReg(StackPtrReg) in emitPrologue()
905 .addReg(StackPtrReg) in emitPrologue()
946 const Register StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitEpilogue() local
967 .addReg(StackPtrReg) in emitEpilogue()
[all …]
H A DSIRegisterInfo.cpp336 MCRegister StackPtrReg = MFI->getStackPtrOffsetReg(); in getReservedRegs() local
338 if (StackPtrReg) { in getReservedRegs()
339 reserveRegisterTuples(Reserved, StackPtrReg); in getReservedRegs()
340 assert(!isSubRegister(ScratchRSrcReg, StackPtrReg)); in getReservedRegs()
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp696 Register StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitPrologue() local
774 StackPtrReg, in emitPrologue()
791 FuncInfo->getScratchRSrcReg(), StackPtrReg, in emitPrologue()
808 FuncInfo->getScratchRSrcReg(), StackPtrReg, in emitPrologue()
879 .addReg(StackPtrReg) in emitPrologue()
889 .addReg(StackPtrReg) in emitPrologue()
899 .addReg(StackPtrReg) in emitPrologue()
905 .addReg(StackPtrReg) in emitPrologue()
946 const Register StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitEpilogue() local
967 .addReg(StackPtrReg) in emitEpilogue()
[all …]
H A DSIRegisterInfo.cpp336 MCRegister StackPtrReg = MFI->getStackPtrOffsetReg(); in getReservedRegs() local
338 if (StackPtrReg) { in getReservedRegs()
339 reserveRegisterTuples(Reserved, StackPtrReg); in getReservedRegs()
340 assert(!isSubRegister(ScratchRSrcReg, StackPtrReg)); in getReservedRegs()
/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp544 unsigned StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitPrologue() local
569 .addReg(StackPtrReg) in emitPrologue()
583 .addReg(StackPtrReg) in emitPrologue()
588 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_ADD_U32), StackPtrReg) in emitPrologue()
589 .addReg(StackPtrReg) in emitPrologue()
623 unsigned StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitEpilogue() local
624 if (StackPtrReg == AMDGPU::NoRegister) in emitEpilogue()
639 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_SUB_U32), StackPtrReg) in emitEpilogue()
640 .addReg(StackPtrReg) in emitEpilogue()
H A DSIRegisterInfo.cpp215 unsigned StackPtrReg = MFI->getStackPtrOffsetReg();
217 if (StackPtrReg != AMDGPU::NoRegister) {
218 reserveRegisterTuples(Reserved, StackPtrReg);
219 assert(!isSubRegister(ScratchRSrcReg, StackPtrReg)); in createSIPeepholeSDWAPass()
/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp544 unsigned StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitPrologue() local
569 .addReg(StackPtrReg) in emitPrologue()
583 .addReg(StackPtrReg) in emitPrologue()
588 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_ADD_U32), StackPtrReg) in emitPrologue()
589 .addReg(StackPtrReg) in emitPrologue()
623 unsigned StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitEpilogue() local
624 if (StackPtrReg == AMDGPU::NoRegister) in emitEpilogue()
639 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_SUB_U32), StackPtrReg) in emitEpilogue()
640 .addReg(StackPtrReg) in emitEpilogue()
H A DSIRegisterInfo.cpp212 unsigned StackPtrReg = MFI->getStackPtrOffsetReg(); in getReservedRegs() local
214 if (StackPtrReg != AMDGPU::NoRegister) { in getReservedRegs()
215 reserveRegisterTuples(Reserved, StackPtrReg); in getReservedRegs()
216 assert(!isSubRegister(ScratchRSrcReg, StackPtrReg)); in getReservedRegs()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp775 Register StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitPrologue() local
853 StackPtrReg, in emitPrologue()
870 FuncInfo->getScratchRSrcReg(), StackPtrReg, in emitPrologue()
887 FuncInfo->getScratchRSrcReg(), StackPtrReg, in emitPrologue()
956 .addReg(StackPtrReg) in emitPrologue()
966 .addReg(StackPtrReg) in emitPrologue()
976 .addReg(StackPtrReg) in emitPrologue()
982 .addReg(StackPtrReg) in emitPrologue()
1023 const Register StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitEpilogue() local
1044 .addReg(StackPtrReg) in emitEpilogue()
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp851 Register StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitPrologue() local
929 StackPtrReg, in emitPrologue()
946 FuncInfo->getScratchRSrcReg(), StackPtrReg, in emitPrologue()
963 FuncInfo->getScratchRSrcReg(), StackPtrReg, in emitPrologue()
1032 .addReg(StackPtrReg) in emitPrologue()
1042 .addReg(StackPtrReg) in emitPrologue()
1052 .addReg(StackPtrReg) in emitPrologue()
1058 .addReg(StackPtrReg) in emitPrologue()
1099 const Register StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitEpilogue() local
1120 .addReg(StackPtrReg) in emitEpilogue()
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp851 Register StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitPrologue() local
929 StackPtrReg, in emitPrologue()
946 FuncInfo->getScratchRSrcReg(), StackPtrReg, in emitPrologue()
963 FuncInfo->getScratchRSrcReg(), StackPtrReg, in emitPrologue()
1032 .addReg(StackPtrReg) in emitPrologue()
1042 .addReg(StackPtrReg) in emitPrologue()
1052 .addReg(StackPtrReg) in emitPrologue()
1058 .addReg(StackPtrReg) in emitPrologue()
1099 const Register StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitEpilogue() local
1120 .addReg(StackPtrReg) in emitEpilogue()
[all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp690 unsigned StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitPrologue() local
738 StackPtrReg, in emitPrologue()
788 .addReg(StackPtrReg) in emitPrologue()
802 .addReg(StackPtrReg) in emitPrologue()
807 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_ADD_U32), StackPtrReg) in emitPrologue()
808 .addReg(StackPtrReg) in emitPrologue()
841 const unsigned StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitEpilogue() local
842 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_SUB_U32), StackPtrReg) in emitEpilogue()
843 .addReg(StackPtrReg) in emitEpilogue()
H A DSIRegisterInfo.cpp236 unsigned StackPtrReg = MFI->getStackPtrOffsetReg(); in getReservedRegs() local
238 if (StackPtrReg != AMDGPU::NoRegister) { in getReservedRegs()
239 reserveRegisterTuples(Reserved, StackPtrReg); in getReservedRegs()
240 assert(!isSubRegister(ScratchRSrcReg, StackPtrReg)); in getReservedRegs()
/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp690 unsigned StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitPrologue() local
738 StackPtrReg, in emitPrologue()
788 .addReg(StackPtrReg) in emitPrologue()
802 .addReg(StackPtrReg) in emitPrologue()
807 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_ADD_U32), StackPtrReg) in emitPrologue()
808 .addReg(StackPtrReg) in emitPrologue()
841 const unsigned StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitEpilogue() local
842 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_SUB_U32), StackPtrReg) in emitEpilogue()
843 .addReg(StackPtrReg) in emitEpilogue()
H A DSIRegisterInfo.cpp236 unsigned StackPtrReg = MFI->getStackPtrOffsetReg(); in getReservedRegs() local
238 if (StackPtrReg != AMDGPU::NoRegister) { in getReservedRegs()
239 reserveRegisterTuples(Reserved, StackPtrReg); in getReservedRegs()
240 assert(!isSubRegister(ScratchRSrcReg, StackPtrReg)); in getReservedRegs()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp690 unsigned StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitPrologue() local
738 StackPtrReg, in emitPrologue()
788 .addReg(StackPtrReg) in emitPrologue()
802 .addReg(StackPtrReg) in emitPrologue()
807 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_ADD_U32), StackPtrReg) in emitPrologue()
808 .addReg(StackPtrReg) in emitPrologue()
841 const unsigned StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitEpilogue() local
842 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_SUB_U32), StackPtrReg) in emitEpilogue()
843 .addReg(StackPtrReg) in emitEpilogue()
H A DSIRegisterInfo.cpp236 unsigned StackPtrReg = MFI->getStackPtrOffsetReg(); in getReservedRegs() local
238 if (StackPtrReg != AMDGPU::NoRegister) { in getReservedRegs()
239 reserveRegisterTuples(Reserved, StackPtrReg); in getReservedRegs()
240 assert(!isSubRegister(ScratchRSrcReg, StackPtrReg)); in getReservedRegs()
/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp690 unsigned StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitPrologue() local
738 StackPtrReg, in emitPrologue()
788 .addReg(StackPtrReg) in emitPrologue()
802 .addReg(StackPtrReg) in emitPrologue()
807 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_ADD_U32), StackPtrReg) in emitPrologue()
808 .addReg(StackPtrReg) in emitPrologue()
841 const unsigned StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitEpilogue() local
842 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_SUB_U32), StackPtrReg) in emitEpilogue()
843 .addReg(StackPtrReg) in emitEpilogue()
H A DSIRegisterInfo.cpp243 unsigned StackPtrReg = MFI->getStackPtrOffsetReg(); in getReservedRegs() local
245 if (StackPtrReg != AMDGPU::NoRegister) { in getReservedRegs()
246 reserveRegisterTuples(Reserved, StackPtrReg); in getReservedRegs()
247 assert(!isSubRegister(ScratchRSrcReg, StackPtrReg)); in getReservedRegs()
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp749 Register StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitPrologue() local
927 .addReg(StackPtrReg) in emitPrologue()
937 .addReg(StackPtrReg) in emitPrologue()
947 .addReg(StackPtrReg) in emitPrologue()
952 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_ADD_I32), StackPtrReg) in emitPrologue()
953 .addReg(StackPtrReg) in emitPrologue()
994 const Register StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitEpilogue() local
1003 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_ADD_I32), StackPtrReg) in emitEpilogue()
1004 .addReg(StackPtrReg) in emitEpilogue()
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp749 Register StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitPrologue() local
927 .addReg(StackPtrReg) in emitPrologue()
937 .addReg(StackPtrReg) in emitPrologue()
947 .addReg(StackPtrReg) in emitPrologue()
952 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_ADD_I32), StackPtrReg) in emitPrologue()
953 .addReg(StackPtrReg) in emitPrologue()
994 const Register StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitEpilogue() local
1003 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_ADD_I32), StackPtrReg) in emitEpilogue()
1004 .addReg(StackPtrReg) in emitEpilogue()
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp749 Register StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitPrologue() local
927 .addReg(StackPtrReg) in emitPrologue()
937 .addReg(StackPtrReg) in emitPrologue()
947 .addReg(StackPtrReg) in emitPrologue()
952 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_ADD_I32), StackPtrReg) in emitPrologue()
953 .addReg(StackPtrReg) in emitPrologue()
994 const Register StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitEpilogue() local
1003 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_ADD_I32), StackPtrReg) in emitEpilogue()
1004 .addReg(StackPtrReg) in emitEpilogue()
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp749 Register StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitPrologue() local
927 .addReg(StackPtrReg) in emitPrologue()
937 .addReg(StackPtrReg) in emitPrologue()
947 .addReg(StackPtrReg) in emitPrologue()
952 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_ADD_I32), StackPtrReg) in emitPrologue()
953 .addReg(StackPtrReg) in emitPrologue()
997 const Register StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitEpilogue() local
1006 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_ADD_I32), StackPtrReg) in emitEpilogue()
1007 .addReg(StackPtrReg) in emitEpilogue()
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp749 Register StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitPrologue() local
927 .addReg(StackPtrReg) in emitPrologue()
937 .addReg(StackPtrReg) in emitPrologue()
947 .addReg(StackPtrReg) in emitPrologue()
952 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_ADD_I32), StackPtrReg) in emitPrologue()
953 .addReg(StackPtrReg) in emitPrologue()
994 const Register StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitEpilogue() local
1003 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_ADD_I32), StackPtrReg) in emitEpilogue()
1004 .addReg(StackPtrReg) in emitEpilogue()
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp749 Register StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitPrologue() local
927 .addReg(StackPtrReg) in emitPrologue()
937 .addReg(StackPtrReg) in emitPrologue()
947 .addReg(StackPtrReg) in emitPrologue()
952 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_ADD_I32), StackPtrReg) in emitPrologue()
953 .addReg(StackPtrReg) in emitPrologue()
994 const Register StackPtrReg = FuncInfo->getStackPtrOffsetReg(); in emitEpilogue() local
1003 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_ADD_I32), StackPtrReg) in emitEpilogue()
1004 .addReg(StackPtrReg) in emitEpilogue()

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