| /dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/tcg/mips/ |
| H A D | tcg-target.c | 89 TCG_REG_A0,
98 TCG_REG_A0,
664 tcg_out_opc_imm(s, OPC_ANDI, TCG_REG_A0, TCG_REG_A0, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS); in tcg_out_qemu_ld()
665 tcg_out_opc_reg(s, OPC_ADDU, TCG_REG_A0, TCG_REG_A0, TCG_AREG0); in tcg_out_qemu_ld()
691 sp_args = TCG_REG_A0; in tcg_out_qemu_ld()
851 tcg_out_opc_imm(s, OPC_ANDI, TCG_REG_A0, TCG_REG_A0, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS); in tcg_out_qemu_st()
852 tcg_out_opc_reg(s, OPC_ADDU, TCG_REG_A0, TCG_REG_A0, TCG_AREG0); in tcg_out_qemu_st()
878 sp_args = TCG_REG_A0; in tcg_out_qemu_st()
920 tcg_out_opc_imm(s, OPC_LW, TCG_REG_A0, TCG_REG_A0, in tcg_out_qemu_st()
922 tcg_out_opc_reg(s, OPC_ADDU, TCG_REG_A0, TCG_REG_A0, addr_regl); in tcg_out_qemu_st()
[all …]
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| H A D | tcg-target.h | 40 TCG_REG_A0, enumerator
|
| /dports/emulators/unicorn/unicorn-1.0.2/qemu/tcg/mips/ |
| H A D | tcg-target.c | 109 TCG_REG_A0,
113 TCG_REG_A0,
188 tcg_regset_reset_reg(ct->u.regs, TCG_REG_A0); in target_parse_constraint()
198 tcg_regset_reset_reg(ct->u.regs, TCG_REG_A0); in target_parse_constraint()
948 tcg_out_opc_sa(s, OPC_SRL, TCG_REG_A0, addrl, in tcg_out_tlb_load()
950 tcg_out_opc_imm(s, OPC_ANDI, TCG_REG_A0, TCG_REG_A0, in tcg_out_tlb_load()
952 tcg_out_opc_reg(s, OPC_ADDU, TCG_REG_A0, TCG_REG_A0, TCG_AREG0); in tcg_out_tlb_load()
962 tcg_out_opc_imm(s, OPC_ADDIU, TCG_REG_A0, TCG_REG_A0, 0x7ff0); in tcg_out_tlb_load()
977 tcg_out_opc_imm(s, OPC_LW, TCG_REG_A0, TCG_REG_A0, add_off); in tcg_out_tlb_load()
1313 base = TCG_REG_A0; in tcg_out_qemu_st()
[all …]
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| H A D | tcg-target.h | 37 TCG_REG_A0, enumerator
|
| /dports/emulators/py-unicorn/unicorn-1.0.2/qemu/tcg/mips/ |
| H A D | tcg-target.c | 109 TCG_REG_A0,
113 TCG_REG_A0,
188 tcg_regset_reset_reg(ct->u.regs, TCG_REG_A0);
198 tcg_regset_reset_reg(ct->u.regs, TCG_REG_A0);
948 tcg_out_opc_sa(s, OPC_SRL, TCG_REG_A0, addrl,
950 tcg_out_opc_imm(s, OPC_ANDI, TCG_REG_A0, TCG_REG_A0,
952 tcg_out_opc_reg(s, OPC_ADDU, TCG_REG_A0, TCG_REG_A0, TCG_AREG0);
962 tcg_out_opc_imm(s, OPC_ADDIU, TCG_REG_A0, TCG_REG_A0, 0x7ff0);
977 tcg_out_opc_imm(s, OPC_LW, TCG_REG_A0, TCG_REG_A0, add_off);
1313 base = TCG_REG_A0;
[all …]
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| H A D | tcg-target.h | 37 TCG_REG_A0,
|
| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/tcg/mips/ |
| H A D | tcg-target.inc.c | 121 TCG_REG_A0,
125 TCG_REG_A0,
203 tcg_regset_reset_reg(ct->u.regs, TCG_REG_A0); in target_parse_constraint()
213 tcg_regset_reset_reg(ct->u.regs, TCG_REG_A0); in target_parse_constraint()
1227 tcg_out_opc_imm(s, OPC_ANDI, TCG_REG_A0, TCG_REG_A0, in tcg_out_tlb_load()
1229 tcg_out_opc_reg(s, ALIAS_PADD, TCG_REG_A0, TCG_REG_A0, TCG_AREG0); in tcg_out_tlb_load()
1236 tcg_out_opc_imm(s, ALIAS_PADDI, TCG_REG_A0, TCG_REG_A0, 0x7ff0); in tcg_out_tlb_load()
1258 TCG_TMP0, TCG_REG_A0, cmp_off); in tcg_out_tlb_load()
1525 TCGReg base = TCG_REG_A0; in tcg_out_qemu_ld()
1628 TCGReg base = TCG_REG_A0; in tcg_out_qemu_st()
[all …]
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| H A D | tcg-target.h | 47 TCG_REG_A0, enumerator
|
| /dports/emulators/qemu60/qemu-6.0.0/tcg/riscv/ |
| H A D | tcg-target.h | 49 TCG_REG_A0, enumerator
|
| /dports/emulators/qemu-utils/qemu-4.2.1/tcg/riscv/ |
| H A D | tcg-target.h | 49 TCG_REG_A0, enumerator
|
| /dports/emulators/qemu5/qemu-5.2.0/tcg/riscv/ |
| H A D | tcg-target.h | 49 TCG_REG_A0, enumerator
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/tcg/riscv/ |
| H A D | tcg-target.h | 49 TCG_REG_A0, enumerator
|
| /dports/emulators/qemu42/qemu-4.2.1/tcg/riscv/ |
| H A D | tcg-target.h | 49 TCG_REG_A0, enumerator
|
| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/tcg/riscv/ |
| H A D | tcg-target.h | 49 TCG_REG_A0, enumerator
|
| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/tcg/riscv/ |
| H A D | tcg-target.h | 50 TCG_REG_A0, enumerator
|
| /dports/emulators/qemu/qemu-6.2.0/tcg/riscv/ |
| H A D | tcg-target.h | 50 TCG_REG_A0, enumerator
|
| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/tcg/mips/ |
| H A D | tcg-target.h | 49 TCG_REG_A0, enumerator
|
| /dports/emulators/qemu/qemu-6.2.0/tcg/mips/ |
| H A D | tcg-target.h | 49 TCG_REG_A0, enumerator
|
| /dports/emulators/qemu60/qemu-6.0.0/tcg/mips/ |
| H A D | tcg-target.h | 47 TCG_REG_A0, enumerator
|
| /dports/emulators/qemu-utils/qemu-4.2.1/tcg/mips/ |
| H A D | tcg-target.h | 47 TCG_REG_A0, enumerator
|
| H A D | tcg-target.inc.c | 121 TCG_REG_A0,
125 TCG_REG_A0,
204 tcg_regset_reset_reg(ct->u.regs, TCG_REG_A0); in target_parse_constraint()
214 tcg_regset_reset_reg(ct->u.regs, TCG_REG_A0); in target_parse_constraint()
1528 TCGReg base = TCG_REG_A0; in tcg_out_qemu_ld()
1631 TCGReg base = TCG_REG_A0; in tcg_out_qemu_st()
1648 base = TCG_REG_A0; in tcg_out_qemu_st()
2634 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_A0); in tcg_target_init()
|
| /dports/emulators/qemu5/qemu-5.2.0/tcg/mips/ |
| H A D | tcg-target.h | 47 TCG_REG_A0, enumerator
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/tcg/mips/ |
| H A D | tcg-target.h | 47 TCG_REG_A0, enumerator
|
| /dports/emulators/qemu42/qemu-4.2.1/tcg/mips/ |
| H A D | tcg-target.h | 47 TCG_REG_A0, enumerator
|
| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/tcg/mips/ |
| H A D | tcg-target.h | 47 TCG_REG_A0, enumerator
|