| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/tcg/sparc/ |
| H A D | tcg-target.inc.c | 84 #define TCG_REG_T2 TCG_REG_O7 macro
320 *code_ptr++ = (ARITH_ADD | INSN_RD(TCG_REG_T2) in patch_reloc()
322 insn ^= INSN_RS1(TCG_REG_TB) ^ INSN_RS1(TCG_REG_T2); in patch_reloc()
520 tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_T2, lo); in tcg_out_movi_int()
522 tcg_out_arith(s, ret, ret, TCG_REG_T2, ARITH_OR); in tcg_out_movi_int()
847 tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_T2, bh); in tcg_out_addsub2_i64()
848 bh = TCG_REG_T2; in tcg_out_addsub2_i64()
855 tcg_out_arithi(s, TCG_REG_T2, ah, 1, in tcg_out_addsub2_i64()
857 tcg_out_movcc(s, TCG_COND_LTU, MOVCC_XCC, rh, TCG_REG_T2, 0); in tcg_out_addsub2_i64()
867 tcg_out_arithi(s, TCG_REG_T2, bh, 1, in tcg_out_addsub2_i64()
[all …]
|
| /dports/emulators/py-unicorn/unicorn-1.0.2/qemu/tcg/sparc/ |
| H A D | tcg-target.c | 84 #define TCG_REG_T2 TCG_REG_O7 macro
473 tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_T2, lo); in tcg_out_movi()
475 tcg_out_arith(s, ret, ret, TCG_REG_T2, ARITH_OR); in tcg_out_movi()
781 tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_T2, bh); in tcg_out_addsub2_i64()
782 bh = TCG_REG_T2; in tcg_out_addsub2_i64()
789 tcg_out_arithi(s, TCG_REG_T2, ah, 1, in tcg_out_addsub2_i64()
791 tcg_out_movcc(s, TCG_COND_LTU, MOVCC_XCC, rh, TCG_REG_T2, 0); in tcg_out_addsub2_i64()
801 tcg_out_arithi(s, TCG_REG_T2, bh, 1, in tcg_out_addsub2_i64()
805 tcg_out_movcc(s, TCG_COND_GEU, MOVCC_XCC, TCG_REG_T2, bh, bhconst); in tcg_out_addsub2_i64()
807 tcg_out_arith(s, rh, ah, TCG_REG_T2, is_sub ? ARITH_SUB : ARITH_ADD); in tcg_out_addsub2_i64()
[all …]
|
| /dports/emulators/unicorn/unicorn-1.0.2/qemu/tcg/sparc/ |
| H A D | tcg-target.c | 84 #define TCG_REG_T2 TCG_REG_O7 macro
473 tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_T2, lo); in tcg_out_movi()
475 tcg_out_arith(s, ret, ret, TCG_REG_T2, ARITH_OR); in tcg_out_movi()
781 tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_T2, bh); in tcg_out_addsub2_i64()
782 bh = TCG_REG_T2; in tcg_out_addsub2_i64()
789 tcg_out_arithi(s, TCG_REG_T2, ah, 1, in tcg_out_addsub2_i64()
791 tcg_out_movcc(s, TCG_COND_LTU, MOVCC_XCC, rh, TCG_REG_T2, 0); in tcg_out_addsub2_i64()
801 tcg_out_arithi(s, TCG_REG_T2, bh, 1, in tcg_out_addsub2_i64()
805 tcg_out_movcc(s, TCG_COND_GEU, MOVCC_XCC, TCG_REG_T2, bh, bhconst); in tcg_out_addsub2_i64()
807 tcg_out_arith(s, rh, ah, TCG_REG_T2, is_sub ? ARITH_SUB : ARITH_ADD); in tcg_out_addsub2_i64()
[all …]
|
| /dports/emulators/qemu-utils/qemu-4.2.1/tcg/sparc/ |
| H A D | tcg-target.inc.c | 84 #define TCG_REG_T2 TCG_REG_O7 macro
493 tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_T2, lo); in tcg_out_movi_int()
495 tcg_out_arith(s, ret, ret, TCG_REG_T2, ARITH_OR); in tcg_out_movi_int()
816 tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_T2, bh); in tcg_out_addsub2_i64()
817 bh = TCG_REG_T2; in tcg_out_addsub2_i64()
824 tcg_out_arithi(s, TCG_REG_T2, ah, 1, in tcg_out_addsub2_i64()
826 tcg_out_movcc(s, TCG_COND_LTU, MOVCC_XCC, rh, TCG_REG_T2, 0); in tcg_out_addsub2_i64()
836 tcg_out_arithi(s, TCG_REG_T2, bh, 1, in tcg_out_addsub2_i64()
840 tcg_out_movcc(s, TCG_COND_GEU, MOVCC_XCC, TCG_REG_T2, bh, bhconst); in tcg_out_addsub2_i64()
842 tcg_out_arith(s, rh, ah, TCG_REG_T2, is_sub ? ARITH_SUB : ARITH_ADD); in tcg_out_addsub2_i64()
[all …]
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/tcg/sparc/ |
| H A D | tcg-target.inc.c | 84 #define TCG_REG_T2 TCG_REG_O7 macro
493 tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_T2, lo); in tcg_out_movi_int()
495 tcg_out_arith(s, ret, ret, TCG_REG_T2, ARITH_OR); in tcg_out_movi_int()
816 tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_T2, bh); in tcg_out_addsub2_i64()
817 bh = TCG_REG_T2; in tcg_out_addsub2_i64()
824 tcg_out_arithi(s, TCG_REG_T2, ah, 1, in tcg_out_addsub2_i64()
826 tcg_out_movcc(s, TCG_COND_LTU, MOVCC_XCC, rh, TCG_REG_T2, 0); in tcg_out_addsub2_i64()
836 tcg_out_arithi(s, TCG_REG_T2, bh, 1, in tcg_out_addsub2_i64()
840 tcg_out_movcc(s, TCG_COND_GEU, MOVCC_XCC, TCG_REG_T2, bh, bhconst); in tcg_out_addsub2_i64()
842 tcg_out_arith(s, rh, ah, TCG_REG_T2, is_sub ? ARITH_SUB : ARITH_ADD); in tcg_out_addsub2_i64()
[all …]
|
| /dports/emulators/qemu42/qemu-4.2.1/tcg/sparc/ |
| H A D | tcg-target.inc.c | 84 #define TCG_REG_T2 TCG_REG_O7 macro
493 tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_T2, lo); in tcg_out_movi_int()
495 tcg_out_arith(s, ret, ret, TCG_REG_T2, ARITH_OR); in tcg_out_movi_int()
816 tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_T2, bh); in tcg_out_addsub2_i64()
817 bh = TCG_REG_T2; in tcg_out_addsub2_i64()
824 tcg_out_arithi(s, TCG_REG_T2, ah, 1, in tcg_out_addsub2_i64()
826 tcg_out_movcc(s, TCG_COND_LTU, MOVCC_XCC, rh, TCG_REG_T2, 0); in tcg_out_addsub2_i64()
836 tcg_out_arithi(s, TCG_REG_T2, bh, 1, in tcg_out_addsub2_i64()
840 tcg_out_movcc(s, TCG_COND_GEU, MOVCC_XCC, TCG_REG_T2, bh, bhconst); in tcg_out_addsub2_i64()
842 tcg_out_arith(s, rh, ah, TCG_REG_T2, is_sub ? ARITH_SUB : ARITH_ADD); in tcg_out_addsub2_i64()
[all …]
|
| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/tcg/sparc/ |
| H A D | tcg-target.inc.c | 84 #define TCG_REG_T2 TCG_REG_O7 macro
493 tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_T2, lo); in tcg_out_movi_int()
495 tcg_out_arith(s, ret, ret, TCG_REG_T2, ARITH_OR); in tcg_out_movi_int()
816 tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_T2, bh); in tcg_out_addsub2_i64()
817 bh = TCG_REG_T2; in tcg_out_addsub2_i64()
824 tcg_out_arithi(s, TCG_REG_T2, ah, 1, in tcg_out_addsub2_i64()
826 tcg_out_movcc(s, TCG_COND_LTU, MOVCC_XCC, rh, TCG_REG_T2, 0); in tcg_out_addsub2_i64()
836 tcg_out_arithi(s, TCG_REG_T2, bh, 1, in tcg_out_addsub2_i64()
840 tcg_out_movcc(s, TCG_COND_GEU, MOVCC_XCC, TCG_REG_T2, bh, bhconst); in tcg_out_addsub2_i64()
842 tcg_out_arith(s, rh, ah, TCG_REG_T2, is_sub ? ARITH_SUB : ARITH_ADD); in tcg_out_addsub2_i64()
[all …]
|
| /dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/tcg/mips/ |
| H A D | tcg-target.h | 46 TCG_REG_T2, enumerator
|
| /dports/emulators/unicorn/unicorn-1.0.2/qemu/tcg/mips/ |
| H A D | tcg-target.h | 43 TCG_REG_T2, enumerator
|
| /dports/emulators/py-unicorn/unicorn-1.0.2/qemu/tcg/mips/ |
| H A D | tcg-target.h | 43 TCG_REG_T2,
|
| /dports/emulators/qemu60/qemu-6.0.0/tcg/riscv/ |
| H A D | tcg-target.h | 46 TCG_REG_T2, enumerator
|
| /dports/emulators/qemu-utils/qemu-4.2.1/tcg/riscv/ |
| H A D | tcg-target.h | 46 TCG_REG_T2, enumerator
|
| /dports/emulators/qemu5/qemu-5.2.0/tcg/riscv/ |
| H A D | tcg-target.h | 46 TCG_REG_T2, enumerator
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/tcg/riscv/ |
| H A D | tcg-target.h | 46 TCG_REG_T2, enumerator
|
| /dports/emulators/qemu42/qemu-4.2.1/tcg/riscv/ |
| H A D | tcg-target.h | 46 TCG_REG_T2, enumerator
|
| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/tcg/riscv/ |
| H A D | tcg-target.h | 46 TCG_REG_T2, enumerator
|
| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/tcg/riscv/ |
| H A D | tcg-target.h | 47 TCG_REG_T2, enumerator
|
| /dports/emulators/qemu/qemu-6.2.0/tcg/riscv/ |
| H A D | tcg-target.h | 47 TCG_REG_T2, enumerator
|
| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/tcg/mips/ |
| H A D | tcg-target.h | 55 TCG_REG_T2, enumerator
|
| /dports/emulators/qemu/qemu-6.2.0/tcg/mips/ |
| H A D | tcg-target.h | 55 TCG_REG_T2, enumerator
|
| /dports/emulators/qemu60/qemu-6.0.0/tcg/mips/ |
| H A D | tcg-target.h | 53 TCG_REG_T2, enumerator
|
| /dports/emulators/qemu-utils/qemu-4.2.1/tcg/mips/ |
| H A D | tcg-target.h | 53 TCG_REG_T2, enumerator
|
| /dports/emulators/qemu5/qemu-5.2.0/tcg/mips/ |
| H A D | tcg-target.h | 53 TCG_REG_T2, enumerator
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/tcg/mips/ |
| H A D | tcg-target.h | 53 TCG_REG_T2, enumerator
|
| /dports/emulators/qemu42/qemu-4.2.1/tcg/mips/ |
| H A D | tcg-target.h | 53 TCG_REG_T2, enumerator
|