| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-nexell/ |
| H A D | timer.c | 52 #define TINT_CSTAT_MASK (0x1F) macro
79 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_start()
95 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_stop()
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| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/mach-nexell/ |
| H A D | timer.c | 52 #define TINT_CSTAT_MASK (0x1F) macro
79 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_start()
95 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_stop()
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| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-nexell/ |
| H A D | timer.c | 52 #define TINT_CSTAT_MASK (0x1F) macro
79 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_start()
95 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_stop()
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| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-nexell/ |
| H A D | timer.c | 52 #define TINT_CSTAT_MASK (0x1F) macro
79 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_start()
95 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_stop()
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| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-nexell/ |
| H A D | timer.c | 52 #define TINT_CSTAT_MASK (0x1F) macro
79 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_start()
95 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_stop()
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| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/mach-nexell/ |
| H A D | timer.c | 52 #define TINT_CSTAT_MASK (0x1F) macro
79 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_start()
95 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_stop()
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| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-nexell/ |
| H A D | timer.c | 52 #define TINT_CSTAT_MASK (0x1F) macro
79 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_start()
95 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_stop()
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| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/mach-nexell/ |
| H A D | timer.c | 52 #define TINT_CSTAT_MASK (0x1F) macro
79 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_start()
95 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_stop()
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| /dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/mach-nexell/ |
| H A D | timer.c | 52 #define TINT_CSTAT_MASK (0x1F) macro
79 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_start()
95 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_stop()
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| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-nexell/ |
| H A D | timer.c | 52 #define TINT_CSTAT_MASK (0x1F) macro
79 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_start()
95 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_stop()
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| /dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/mach-nexell/ |
| H A D | timer.c | 52 #define TINT_CSTAT_MASK (0x1F) macro
79 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_start()
95 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_stop()
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| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-nexell/ |
| H A D | timer.c | 52 #define TINT_CSTAT_MASK (0x1F) macro
79 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_start()
95 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_stop()
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| /dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/arm/mach-nexell/ |
| H A D | timer.c | 52 #define TINT_CSTAT_MASK (0x1F) macro
79 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_start()
95 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_stop()
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| /dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/mach-nexell/ |
| H A D | timer.c | 52 #define TINT_CSTAT_MASK (0x1F) macro
79 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_start()
95 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_stop()
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| /dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/arm/mach-nexell/ |
| H A D | timer.c | 52 #define TINT_CSTAT_MASK (0x1F) macro
79 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_start()
95 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_stop()
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| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/mach-nexell/ |
| H A D | timer.c | 52 #define TINT_CSTAT_MASK (0x1F) macro
79 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_start()
95 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_stop()
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| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/mach-nexell/ |
| H A D | timer.c | 52 #define TINT_CSTAT_MASK (0x1F) macro
79 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_start()
95 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_stop()
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| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/mach-nexell/ |
| H A D | timer.c | 52 #define TINT_CSTAT_MASK (0x1F) macro
79 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_start()
95 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_stop()
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| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/mach-nexell/ |
| H A D | timer.c | 52 #define TINT_CSTAT_MASK (0x1F) macro
79 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_start()
95 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_stop()
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| /dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/mach-nexell/ |
| H A D | timer.c | 52 #define TINT_CSTAT_MASK (0x1F) macro
79 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_start()
95 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_stop()
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| /dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/arch/arm/mach-nexell/ |
| H A D | timer.c | 52 #define TINT_CSTAT_MASK (0x1F) macro
79 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_start()
95 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_stop()
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| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/arch/arm/mach-nexell/ |
| H A D | timer.c | 52 #define TINT_CSTAT_MASK (0x1F) macro
79 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_start()
95 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_stop()
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| /dports/sysutils/u-boot-pcduino3/u-boot-2021.07/arch/arm/mach-nexell/ |
| H A D | timer.c | 52 #define TINT_CSTAT_MASK (0x1F) macro
79 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_start()
95 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_stop()
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| /dports/sysutils/u-boot-pine-h64/u-boot-2021.07/arch/arm/mach-nexell/ |
| H A D | timer.c | 52 #define TINT_CSTAT_MASK (0x1F) in nx_tieoff_set()
79 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in nx_tieoff_get()
95 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch);
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| /dports/sysutils/u-boot-pine64/u-boot-2021.07/arch/arm/mach-nexell/ |
| H A D | timer.c | 52 #define TINT_CSTAT_MASK (0x1F) macro
79 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_start()
95 u32 val = readl(base + REG_CSTAT) & ~(TINT_CSTAT_MASK << 5 | 0x1 << ch); in timer_stop()
|