/dports/devel/vasm/vasm/cpus/ppc/ |
H A D | cpu.h | 247 #define TOLNL (0x5) macro
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H A D | opcodes.h | 5 "tdlnli", { RA, SI } ,{PPC64, OPTO(2,TOLNL)}, 25 "twlnli", { RA, SI } ,{PPCCOM, OPTO(3,TOLNL)}, 26 "tlnli", { RA, SI } ,{PWRCOM, OPTO(3,TOLNL)}, 1286 "twlnl", { RA, RB } ,{PPCCOM, XTO(31,4,TOLNL)}, 1287 "tlnl", { RA, RB } ,{PWRCOM, XTO(31,4,TOLNL)}, 1405 "tdlnl", { RA, RB } ,{PPC64, XTO(31,68,TOLNL)},
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/dports/lang/smalltalk/smalltalk-3.2.5/opcode/ |
H A D | ppc-opc.c | 1207 #define TOLNL (0x5) macro 1260 { "tdlnli", OPTO(2,TOLNL), OPTO_MASK, PPC64, { RA, SI } }, 1280 { "twlnli", OPTO(3,TOLNL), OPTO_MASK, PPCCOM, { RA, SI } }, 1281 { "tlnli", OPTO(3,TOLNL), OPTO_MASK, PWRCOM, { RA, SI } }, 1981 { "twlnl", XTO(31,4,TOLNL), XTO_MASK, PPCCOM, { RA, RB } }, 1982 { "tlnl", XTO(31,4,TOLNL), XTO_MASK, PWRCOM, { RA, RB } }, 2092 { "tdlnl", XTO(31,68,TOLNL), XTO_MASK, PPC64, { RA, RB } },
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/dports/games/iortcw/iortcw-1.51c/MP/code/qcommon/ |
H A D | vm_powerpc_asm.c | 886 #define TOLNL (0x5) macro
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/dports/games/ioquake3/ioquake3-1.36/code/qcommon/ |
H A D | vm_powerpc_asm.c | 889 #define TOLNL (0x5) macro
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/dports/games/ioquake3-server/ioquake3-1.36/code/qcommon/ |
H A D | vm_powerpc_asm.c | 889 #define TOLNL (0x5) macro
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/dports/games/iortcw/iortcw-1.51c/SP/code/qcommon/ |
H A D | vm_powerpc_asm.c | 886 #define TOLNL (0x5) macro
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/dports/games/openarena/openarena-engine-source-0.8.8/code/qcommon/ |
H A D | vm_powerpc_asm.c | 888 #define TOLNL (0x5) macro
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/dports/games/openarena-server/openarena-engine-source-0.8.8/code/qcommon/ |
H A D | vm_powerpc_asm.c | 888 #define TOLNL (0x5) macro
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/dports/editors/hte/ht-e9e63373148da5d7df397d8075740d8c096ecb1d/asm/ |
H A D | ppcopc.cc | 1191 #define TOLNL (0x5) macro 1269 { "tdlnli", OPTO(2,TOLNL), OPTO_MASK, PPC64, { RA, SI } }, 1289 { "twlnli", OPTO(3,TOLNL), OPTO_MASK, PPCCOM, { RA, SI } }, 1290 { "tlnli", OPTO(3,TOLNL), OPTO_MASK, PWRCOM, { RA, SI } }, 2310 { "twlnl", XTO(31,4,TOLNL), XTO_MASK, PPCCOM, { RA, RB } }, 2393 { "tdlnl", XTO(31,68,TOLNL), XTO_MASK, PPC64, { RA, RB } },
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/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/opcodes/ |
H A D | ppc-opc.c | 1741 #define TOLNL (0x5) macro 1814 { "tdlnli", OPTO(2,TOLNL), OPTO_MASK, PPC64, { RA, SI } }, 1834 { "twlnli", OPTO(3,TOLNL), OPTO_MASK, PPCCOM, { RA, SI } }, 1835 { "tlnli", OPTO(3,TOLNL), OPTO_MASK, PWRCOM, { RA, SI } }, 3162 { "twlnl", XTO(31,4,TOLNL), XTO_MASK, PPCCOM, { RA, RB } }, 3163 { "tlnl", XTO(31,4,TOLNL), XTO_MASK, PWRCOM, { RA, RB } }, 3290 { "tdlnl", XTO(31,68,TOLNL), XTO_MASK, PPC64, { RA, RB } },
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/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/opcodes/ |
H A D | ppc-opc.c | 1760 #define TOLNL (0x5) macro 1833 { "tdlnli", OPTO(2,TOLNL), OPTO_MASK, PPC64, { RA, SI } }, 1853 { "twlnli", OPTO(3,TOLNL), OPTO_MASK, PPCCOM, { RA, SI } }, 1854 { "tlnli", OPTO(3,TOLNL), OPTO_MASK, PWRCOM, { RA, SI } }, 3216 { "twlnl", XTO(31,4,TOLNL), XTO_MASK, PPCCOM, { RA, RB } }, 3217 { "tlnl", XTO(31,4,TOLNL), XTO_MASK, PWRCOM, { RA, RB } }, 3345 { "tdlnl", XTO(31,68,TOLNL), XTO_MASK, PPC64, { RA, RB } },
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/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/opcodes/ |
H A D | ppc-opc.c | 1741 #define TOLNL (0x5) macro 1814 { "tdlnli", OPTO(2,TOLNL), OPTO_MASK, PPC64, { RA, SI } }, 1834 { "twlnli", OPTO(3,TOLNL), OPTO_MASK, PPCCOM, { RA, SI } }, 1835 { "tlnli", OPTO(3,TOLNL), OPTO_MASK, PWRCOM, { RA, SI } }, 3162 { "twlnl", XTO(31,4,TOLNL), XTO_MASK, PPCCOM, { RA, RB } }, 3163 { "tlnl", XTO(31,4,TOLNL), XTO_MASK, PWRCOM, { RA, RB } }, 3290 { "tdlnl", XTO(31,68,TOLNL), XTO_MASK, PPC64, { RA, RB } },
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/dports/devel/djgpp-binutils/binutils-2.17/opcodes/ |
H A D | ppc-opc.c | 1806 #define TOLNL (0x5) macro 1881 { "tdlnli", OPTO(2,TOLNL), OPTO_MASK, PPC64, { RA, SI } }, 1901 { "twlnli", OPTO(3,TOLNL), OPTO_MASK, PPCCOM, { RA, SI } }, 1902 { "tlnli", OPTO(3,TOLNL), OPTO_MASK, PWRCOM, { RA, SI } }, 3266 { "twlnl", XTO(31,4,TOLNL), XTO_MASK, PPCCOM, { RA, RB } }, 3267 { "tlnl", XTO(31,4,TOLNL), XTO_MASK, PWRCOM, { RA, RB } }, 3395 { "tdlnl", XTO(31,68,TOLNL), XTO_MASK, PPC64, { RA, RB } },
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/dports/emulators/qemu/qemu-6.2.0/disas/ |
H A D | ppc.c | 1940 #define TOLNL (0x5) macro 2020 { "tdlnli", OPTO(2,TOLNL), OPTO_MASK, PPC64, { RA, SI } }, 2040 { "twlnli", OPTO(3,TOLNL), OPTO_MASK, PPCCOM, { RA, SI } }, 2041 { "tlnli", OPTO(3,TOLNL), OPTO_MASK, PWRCOM, { RA, SI } }, 3416 { "twlnl", XTO(31,4,TOLNL), XTO_MASK, PPCCOM, { RA, RB } }, 3417 { "tlnl", XTO(31,4,TOLNL), XTO_MASK, PWRCOM, { RA, RB } }, 3545 { "tdlnl", XTO(31,68,TOLNL), XTO_MASK, PPC64, { RA, RB } },
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/dports/emulators/qemu42/qemu-4.2.1/disas/ |
H A D | ppc.c | 1940 #define TOLNL (0x5) macro 2020 { "tdlnli", OPTO(2,TOLNL), OPTO_MASK, PPC64, { RA, SI } }, 2040 { "twlnli", OPTO(3,TOLNL), OPTO_MASK, PPCCOM, { RA, SI } }, 2041 { "tlnli", OPTO(3,TOLNL), OPTO_MASK, PWRCOM, { RA, SI } }, 3416 { "twlnl", XTO(31,4,TOLNL), XTO_MASK, PPCCOM, { RA, RB } }, 3417 { "tlnl", XTO(31,4,TOLNL), XTO_MASK, PWRCOM, { RA, RB } }, 3545 { "tdlnl", XTO(31,68,TOLNL), XTO_MASK, PPC64, { RA, RB } },
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/dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/ |
H A D | ppc-dis.c | 1936 #define TOLNL (0x5) macro 2013 { "tdlnli", OPTO(2,TOLNL), OPTO_MASK, PPC64, { RA, SI } }, 2033 { "twlnli", OPTO(3,TOLNL), OPTO_MASK, PPCCOM, { RA, SI } }, 2034 { "tlnli", OPTO(3,TOLNL), OPTO_MASK, PWRCOM, { RA, SI } }, 3405 { "twlnl", XTO(31,4,TOLNL), XTO_MASK, PPCCOM, { RA, RB } }, 3406 { "tlnl", XTO(31,4,TOLNL), XTO_MASK, PWRCOM, { RA, RB } }, 3534 { "tdlnl", XTO(31,68,TOLNL), XTO_MASK, PPC64, { RA, RB } },
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/dports/emulators/qemu5/qemu-5.2.0/disas/ |
H A D | ppc.c | 1940 #define TOLNL (0x5) macro 2020 { "tdlnli", OPTO(2,TOLNL), OPTO_MASK, PPC64, { RA, SI } }, 2040 { "twlnli", OPTO(3,TOLNL), OPTO_MASK, PPCCOM, { RA, SI } }, 2041 { "tlnli", OPTO(3,TOLNL), OPTO_MASK, PWRCOM, { RA, SI } }, 3416 { "twlnl", XTO(31,4,TOLNL), XTO_MASK, PPCCOM, { RA, RB } }, 3417 { "tlnl", XTO(31,4,TOLNL), XTO_MASK, PWRCOM, { RA, RB } }, 3545 { "tdlnl", XTO(31,68,TOLNL), XTO_MASK, PPC64, { RA, RB } },
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/dports/emulators/qemu60/qemu-6.0.0/disas/ |
H A D | ppc.c | 1940 #define TOLNL (0x5) macro 2020 { "tdlnli", OPTO(2,TOLNL), OPTO_MASK, PPC64, { RA, SI } }, 2040 { "twlnli", OPTO(3,TOLNL), OPTO_MASK, PPCCOM, { RA, SI } }, 2041 { "tlnli", OPTO(3,TOLNL), OPTO_MASK, PWRCOM, { RA, SI } }, 3416 { "twlnl", XTO(31,4,TOLNL), XTO_MASK, PPCCOM, { RA, RB } }, 3417 { "tlnl", XTO(31,4,TOLNL), XTO_MASK, PWRCOM, { RA, RB } }, 3545 { "tdlnl", XTO(31,68,TOLNL), XTO_MASK, PPC64, { RA, RB } },
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/disas/ |
H A D | ppc.c | 1937 #define TOLNL (0x5) macro 2017 { "tdlnli", OPTO(2,TOLNL), OPTO_MASK, PPC64, { RA, SI } }, 2037 { "twlnli", OPTO(3,TOLNL), OPTO_MASK, PPCCOM, { RA, SI } }, 2038 { "tlnli", OPTO(3,TOLNL), OPTO_MASK, PWRCOM, { RA, SI } }, 3413 { "twlnl", XTO(31,4,TOLNL), XTO_MASK, PPCCOM, { RA, RB } }, 3414 { "tlnl", XTO(31,4,TOLNL), XTO_MASK, PWRCOM, { RA, RB } }, 3542 { "tdlnl", XTO(31,68,TOLNL), XTO_MASK, PPC64, { RA, RB } },
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/dports/devel/radare2/radare2-5.1.1/libr/asm/arch/ppc/gnu/ |
H A D | ppc-opc.c | 1818 #define TOLNL (0x5) macro 1903 {"tdlnli", OPTO(2,TOLNL), OPTO_MASK, PPC64, {RA, SI}}, 1923 {"twlnli", OPTO(3,TOLNL), OPTO_MASK, PPCCOM, {RA, SI}}, 1924 {"tlnli", OPTO(3,TOLNL), OPTO_MASK, PWRCOM, {RA, SI}}, 3382 {"twlnl", XTO(31,4,TOLNL), XTO_MASK, PPCCOM, {RA, RB}}, 3383 {"tlnl", XTO(31,4,TOLNL), XTO_MASK, PWRCOM, {RA, RB}}, 3516 {"tdlnl", XTO(31,68,TOLNL), XTO_MASK, PPC64, {RA, RB}},
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/dports/emulators/qemu-utils/qemu-4.2.1/disas/ |
H A D | ppc.c | 1940 #define TOLNL (0x5) macro 2020 { "tdlnli", OPTO(2,TOLNL), OPTO_MASK, PPC64, { RA, SI } }, 2040 { "twlnli", OPTO(3,TOLNL), OPTO_MASK, PPCCOM, { RA, SI } }, 2041 { "tlnli", OPTO(3,TOLNL), OPTO_MASK, PWRCOM, { RA, SI } }, 3416 { "twlnl", XTO(31,4,TOLNL), XTO_MASK, PPCCOM, { RA, RB } }, 3417 { "tlnl", XTO(31,4,TOLNL), XTO_MASK, PWRCOM, { RA, RB } }, 3545 { "tdlnl", XTO(31,68,TOLNL), XTO_MASK, PPC64, { RA, RB } },
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/disas/ |
H A D | ppc.c | 1940 #define TOLNL (0x5) macro 2020 { "tdlnli", OPTO(2,TOLNL), OPTO_MASK, PPC64, { RA, SI } }, 2040 { "twlnli", OPTO(3,TOLNL), OPTO_MASK, PPCCOM, { RA, SI } }, 2041 { "tlnli", OPTO(3,TOLNL), OPTO_MASK, PWRCOM, { RA, SI } }, 3416 { "twlnl", XTO(31,4,TOLNL), XTO_MASK, PPCCOM, { RA, RB } }, 3417 { "tlnl", XTO(31,4,TOLNL), XTO_MASK, PWRCOM, { RA, RB } }, 3545 { "tdlnl", XTO(31,68,TOLNL), XTO_MASK, PPC64, { RA, RB } },
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/disas/ |
H A D | ppc.c | 1940 #define TOLNL (0x5) macro 2020 { "tdlnli", OPTO(2,TOLNL), OPTO_MASK, PPC64, { RA, SI } }, 2040 { "twlnli", OPTO(3,TOLNL), OPTO_MASK, PPCCOM, { RA, SI } }, 2041 { "tlnli", OPTO(3,TOLNL), OPTO_MASK, PWRCOM, { RA, SI } }, 3416 { "twlnl", XTO(31,4,TOLNL), XTO_MASK, PPCCOM, { RA, RB } }, 3417 { "tlnl", XTO(31,4,TOLNL), XTO_MASK, PWRCOM, { RA, RB } }, 3545 { "tdlnl", XTO(31,68,TOLNL), XTO_MASK, PPC64, { RA, RB } },
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/disas/ |
H A D | ppc.c | 1940 #define TOLNL (0x5) macro 2020 { "tdlnli", OPTO(2,TOLNL), OPTO_MASK, PPC64, { RA, SI } }, 2040 { "twlnli", OPTO(3,TOLNL), OPTO_MASK, PPCCOM, { RA, SI } }, 2041 { "tlnli", OPTO(3,TOLNL), OPTO_MASK, PWRCOM, { RA, SI } }, 3416 { "twlnl", XTO(31,4,TOLNL), XTO_MASK, PPCCOM, { RA, RB } }, 3417 { "tlnl", XTO(31,4,TOLNL), XTO_MASK, PWRCOM, { RA, RB } }, 3545 { "tdlnl", XTO(31,68,TOLNL), XTO_MASK, PPC64, { RA, RB } },
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