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Searched refs:TONL (Results 1 – 25 of 37) sorted by relevance

12

/dports/databases/postgresql-prefix/prefix-1.2.9/
H A Dprefixes.fr.csv65 "010192";"CLUB INTERNET";"TONL";"S"
66 "010193";"CLUB INTERNET";"TONL";"S"
67 "010194";"CLUB INTERNET";"TONL";"S"
841 "017734";"CLUB INTERNET";"TONL";"S"
866 "017759";"CLUB INTERNET";"TONL";"S"
867 "017760";"CLUB INTERNET";"TONL";"S"
883 "017776";"CLUB INTERNET";"TONL";"S"
888 "017781";"CLUB INTERNET";"TONL";"S"
889 "017782";"CLUB INTERNET";"TONL";"S"
890 "017783";"CLUB INTERNET";"TONL";"S"
[all …]
/dports/devel/vasm/vasm/cpus/ppc/
H A Dcpu.h252 #define TONL (0xc) macro
H A Dopcodes.h10 "tdnli", { RA, SI } ,{PPC64, OPTO(2,TONL)},
35 "twnli", { RA, SI } ,{PPCCOM, OPTO(3,TONL)},
36 "tnli", { RA, SI } ,{PWRCOM, OPTO(3,TONL)},
1296 "twnl", { RA, RB } ,{PPCCOM, XTO(31,4,TONL)},
1297 "tnl", { RA, RB } ,{PWRCOM, XTO(31,4,TONL)},
1410 "tdnl", { RA, RB } ,{PPC64, XTO(31,68,TONL)},
/dports/lang/smalltalk/smalltalk-3.2.5/opcode/
H A Dppc-opc.c1212 #define TONL (0xc) macro
1265 { "tdnli", OPTO(2,TONL), OPTO_MASK, PPC64, { RA, SI } },
1290 { "twnli", OPTO(3,TONL), OPTO_MASK, PPCCOM, { RA, SI } },
1291 { "tnli", OPTO(3,TONL), OPTO_MASK, PWRCOM, { RA, SI } },
1991 { "twnl", XTO(31,4,TONL), XTO_MASK, PPCCOM, { RA, RB } },
1992 { "tnl", XTO(31,4,TONL), XTO_MASK, PWRCOM, { RA, RB } },
2097 { "tdnl", XTO(31,68,TONL), XTO_MASK, PPC64, { RA, RB } },
/dports/games/iortcw/iortcw-1.51c/MP/code/qcommon/
H A Dvm_powerpc_asm.c891 #define TONL (0xc) macro
/dports/games/ioquake3/ioquake3-1.36/code/qcommon/
H A Dvm_powerpc_asm.c894 #define TONL (0xc) macro
/dports/games/ioquake3-server/ioquake3-1.36/code/qcommon/
H A Dvm_powerpc_asm.c894 #define TONL (0xc) macro
/dports/games/iortcw/iortcw-1.51c/SP/code/qcommon/
H A Dvm_powerpc_asm.c891 #define TONL (0xc) macro
/dports/games/openarena/openarena-engine-source-0.8.8/code/qcommon/
H A Dvm_powerpc_asm.c893 #define TONL (0xc) macro
/dports/games/openarena-server/openarena-engine-source-0.8.8/code/qcommon/
H A Dvm_powerpc_asm.c893 #define TONL (0xc) macro
/dports/editors/hte/ht-e9e63373148da5d7df397d8075740d8c096ecb1d/asm/
H A Dppcopc.cc1196 #define TONL (0xc) macro
1274 { "tdnli", OPTO(2,TONL), OPTO_MASK, PPC64, { RA, SI } },
1299 { "twnli", OPTO(3,TONL), OPTO_MASK, PPCCOM, { RA, SI } },
1300 { "tnli", OPTO(3,TONL), OPTO_MASK, PWRCOM, { RA, SI } },
2315 { "twnl", XTO(31,4,TONL), XTO_MASK, PPCCOM, { RA, RB } },
2398 { "tdnl", XTO(31,68,TONL), XTO_MASK, PPC64, { RA, RB } },
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/opcodes/
H A Dppc-opc.c1746 #define TONL (0xc) macro
1819 { "tdnli", OPTO(2,TONL), OPTO_MASK, PPC64, { RA, SI } },
1844 { "twnli", OPTO(3,TONL), OPTO_MASK, PPCCOM, { RA, SI } },
1845 { "tnli", OPTO(3,TONL), OPTO_MASK, PWRCOM, { RA, SI } },
3172 { "twnl", XTO(31,4,TONL), XTO_MASK, PPCCOM, { RA, RB } },
3173 { "tnl", XTO(31,4,TONL), XTO_MASK, PWRCOM, { RA, RB } },
3295 { "tdnl", XTO(31,68,TONL), XTO_MASK, PPC64, { RA, RB } },
/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/opcodes/
H A Dppc-opc.c1765 #define TONL (0xc) macro
1838 { "tdnli", OPTO(2,TONL), OPTO_MASK, PPC64, { RA, SI } },
1863 { "twnli", OPTO(3,TONL), OPTO_MASK, PPCCOM, { RA, SI } },
1864 { "tnli", OPTO(3,TONL), OPTO_MASK, PWRCOM, { RA, SI } },
3226 { "twnl", XTO(31,4,TONL), XTO_MASK, PPCCOM, { RA, RB } },
3227 { "tnl", XTO(31,4,TONL), XTO_MASK, PWRCOM, { RA, RB } },
3350 { "tdnl", XTO(31,68,TONL), XTO_MASK, PPC64, { RA, RB } },
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/opcodes/
H A Dppc-opc.c1746 #define TONL (0xc) macro
1819 { "tdnli", OPTO(2,TONL), OPTO_MASK, PPC64, { RA, SI } },
1844 { "twnli", OPTO(3,TONL), OPTO_MASK, PPCCOM, { RA, SI } },
1845 { "tnli", OPTO(3,TONL), OPTO_MASK, PWRCOM, { RA, SI } },
3172 { "twnl", XTO(31,4,TONL), XTO_MASK, PPCCOM, { RA, RB } },
3173 { "tnl", XTO(31,4,TONL), XTO_MASK, PWRCOM, { RA, RB } },
3295 { "tdnl", XTO(31,68,TONL), XTO_MASK, PPC64, { RA, RB } },
/dports/devel/djgpp-binutils/binutils-2.17/opcodes/
H A Dppc-opc.c1811 #define TONL (0xc) macro
1886 { "tdnli", OPTO(2,TONL), OPTO_MASK, PPC64, { RA, SI } },
1911 { "twnli", OPTO(3,TONL), OPTO_MASK, PPCCOM, { RA, SI } },
1912 { "tnli", OPTO(3,TONL), OPTO_MASK, PWRCOM, { RA, SI } },
3276 { "twnl", XTO(31,4,TONL), XTO_MASK, PPCCOM, { RA, RB } },
3277 { "tnl", XTO(31,4,TONL), XTO_MASK, PWRCOM, { RA, RB } },
3400 { "tdnl", XTO(31,68,TONL), XTO_MASK, PPC64, { RA, RB } },
/dports/emulators/qemu/qemu-6.2.0/disas/
H A Dppc.c1945 #define TONL (0xc) macro
2025 { "tdnli", OPTO(2,TONL), OPTO_MASK, PPC64, { RA, SI } },
2050 { "twnli", OPTO(3,TONL), OPTO_MASK, PPCCOM, { RA, SI } },
2051 { "tnli", OPTO(3,TONL), OPTO_MASK, PWRCOM, { RA, SI } },
3426 { "twnl", XTO(31,4,TONL), XTO_MASK, PPCCOM, { RA, RB } },
3427 { "tnl", XTO(31,4,TONL), XTO_MASK, PWRCOM, { RA, RB } },
3550 { "tdnl", XTO(31,68,TONL), XTO_MASK, PPC64, { RA, RB } },
/dports/emulators/qemu42/qemu-4.2.1/disas/
H A Dppc.c1945 #define TONL (0xc) macro
2025 { "tdnli", OPTO(2,TONL), OPTO_MASK, PPC64, { RA, SI } },
2050 { "twnli", OPTO(3,TONL), OPTO_MASK, PPCCOM, { RA, SI } },
2051 { "tnli", OPTO(3,TONL), OPTO_MASK, PWRCOM, { RA, SI } },
3426 { "twnl", XTO(31,4,TONL), XTO_MASK, PPCCOM, { RA, RB } },
3427 { "tnl", XTO(31,4,TONL), XTO_MASK, PWRCOM, { RA, RB } },
3550 { "tdnl", XTO(31,68,TONL), XTO_MASK, PPC64, { RA, RB } },
/dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/
H A Dppc-dis.c1941 #define TONL (0xc) macro
2018 { "tdnli", OPTO(2,TONL), OPTO_MASK, PPC64, { RA, SI } },
2043 { "twnli", OPTO(3,TONL), OPTO_MASK, PPCCOM, { RA, SI } },
2044 { "tnli", OPTO(3,TONL), OPTO_MASK, PWRCOM, { RA, SI } },
3415 { "twnl", XTO(31,4,TONL), XTO_MASK, PPCCOM, { RA, RB } },
3416 { "tnl", XTO(31,4,TONL), XTO_MASK, PWRCOM, { RA, RB } },
3539 { "tdnl", XTO(31,68,TONL), XTO_MASK, PPC64, { RA, RB } },
/dports/emulators/qemu5/qemu-5.2.0/disas/
H A Dppc.c1945 #define TONL (0xc) macro
2025 { "tdnli", OPTO(2,TONL), OPTO_MASK, PPC64, { RA, SI } },
2050 { "twnli", OPTO(3,TONL), OPTO_MASK, PPCCOM, { RA, SI } },
2051 { "tnli", OPTO(3,TONL), OPTO_MASK, PWRCOM, { RA, SI } },
3426 { "twnl", XTO(31,4,TONL), XTO_MASK, PPCCOM, { RA, RB } },
3427 { "tnl", XTO(31,4,TONL), XTO_MASK, PWRCOM, { RA, RB } },
3550 { "tdnl", XTO(31,68,TONL), XTO_MASK, PPC64, { RA, RB } },
/dports/emulators/qemu60/qemu-6.0.0/disas/
H A Dppc.c1945 #define TONL (0xc) macro
2025 { "tdnli", OPTO(2,TONL), OPTO_MASK, PPC64, { RA, SI } },
2050 { "twnli", OPTO(3,TONL), OPTO_MASK, PPCCOM, { RA, SI } },
2051 { "tnli", OPTO(3,TONL), OPTO_MASK, PWRCOM, { RA, SI } },
3426 { "twnl", XTO(31,4,TONL), XTO_MASK, PPCCOM, { RA, RB } },
3427 { "tnl", XTO(31,4,TONL), XTO_MASK, PWRCOM, { RA, RB } },
3550 { "tdnl", XTO(31,68,TONL), XTO_MASK, PPC64, { RA, RB } },
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/disas/
H A Dppc.c1942 #define TONL (0xc) macro
2022 { "tdnli", OPTO(2,TONL), OPTO_MASK, PPC64, { RA, SI } },
2047 { "twnli", OPTO(3,TONL), OPTO_MASK, PPCCOM, { RA, SI } },
2048 { "tnli", OPTO(3,TONL), OPTO_MASK, PWRCOM, { RA, SI } },
3423 { "twnl", XTO(31,4,TONL), XTO_MASK, PPCCOM, { RA, RB } },
3424 { "tnl", XTO(31,4,TONL), XTO_MASK, PWRCOM, { RA, RB } },
3547 { "tdnl", XTO(31,68,TONL), XTO_MASK, PPC64, { RA, RB } },
/dports/devel/radare2/radare2-5.1.1/libr/asm/arch/ppc/gnu/
H A Dppc-opc.c1823 #define TONL (0xc) macro
1908 {"tdnli", OPTO(2,TONL), OPTO_MASK, PPC64, {RA, SI}},
1933 {"twnli", OPTO(3,TONL), OPTO_MASK, PPCCOM, {RA, SI}},
1934 {"tnli", OPTO(3,TONL), OPTO_MASK, PWRCOM, {RA, SI}},
3392 {"twnl", XTO(31,4,TONL), XTO_MASK, PPCCOM, {RA, RB}},
3393 {"tnl", XTO(31,4,TONL), XTO_MASK, PWRCOM, {RA, RB}},
3521 {"tdnl", XTO(31,68,TONL), XTO_MASK, PPC64, {RA, RB}},
/dports/emulators/qemu-utils/qemu-4.2.1/disas/
H A Dppc.c1945 #define TONL (0xc) macro
2025 { "tdnli", OPTO(2,TONL), OPTO_MASK, PPC64, { RA, SI } },
2050 { "twnli", OPTO(3,TONL), OPTO_MASK, PPCCOM, { RA, SI } },
2051 { "tnli", OPTO(3,TONL), OPTO_MASK, PWRCOM, { RA, SI } },
3426 { "twnl", XTO(31,4,TONL), XTO_MASK, PPCCOM, { RA, RB } },
3427 { "tnl", XTO(31,4,TONL), XTO_MASK, PWRCOM, { RA, RB } },
3550 { "tdnl", XTO(31,68,TONL), XTO_MASK, PPC64, { RA, RB } },
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/disas/
H A Dppc.c1945 #define TONL (0xc) macro
2025 { "tdnli", OPTO(2,TONL), OPTO_MASK, PPC64, { RA, SI } },
2050 { "twnli", OPTO(3,TONL), OPTO_MASK, PPCCOM, { RA, SI } },
2051 { "tnli", OPTO(3,TONL), OPTO_MASK, PWRCOM, { RA, SI } },
3426 { "twnl", XTO(31,4,TONL), XTO_MASK, PPCCOM, { RA, RB } },
3427 { "tnl", XTO(31,4,TONL), XTO_MASK, PWRCOM, { RA, RB } },
3550 { "tdnl", XTO(31,68,TONL), XTO_MASK, PPC64, { RA, RB } },
/dports/emulators/qemu-guest-agent/qemu-5.0.1/disas/
H A Dppc.c1945 #define TONL (0xc) macro
2025 { "tdnli", OPTO(2,TONL), OPTO_MASK, PPC64, { RA, SI } },
2050 { "twnli", OPTO(3,TONL), OPTO_MASK, PPCCOM, { RA, SI } },
2051 { "tnli", OPTO(3,TONL), OPTO_MASK, PWRCOM, { RA, SI } },
3426 { "twnl", XTO(31,4,TONL), XTO_MASK, PPCCOM, { RA, RB } },
3427 { "tnl", XTO(31,4,TONL), XTO_MASK, PWRCOM, { RA, RB } },
3550 { "tdnl", XTO(31,68,TONL), XTO_MASK, PPC64, { RA, RB } },

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