| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/hwtracing/coresight/ |
| H A D | coresight-etm4x.h | 43 #define TRCVISSCTLR 0x088 macro
197 CASE_##op((val), TRCVISSCTLR) \
|
| H A D | coresight-etm4x-core.c | 380 etm4x_relaxed_write32(csa, config->vissctlr, TRCVISSCTLR); in etm4_enable_hw()
1590 state->trcvissctlr = etm4x_read32(csa, TRCVISSCTLR); in etm4_cpu_save()
1703 etm4x_relaxed_write32(csa, state->trcvissctlr, TRCVISSCTLR); in etm4_cpu_restore()
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/hwtracing/coresight/ |
| H A D | coresight-etm4x.h | 43 #define TRCVISSCTLR 0x088 macro
197 CASE_##op((val), TRCVISSCTLR) \
|
| H A D | coresight-etm4x-core.c | 380 etm4x_relaxed_write32(csa, config->vissctlr, TRCVISSCTLR); in etm4_enable_hw()
1590 state->trcvissctlr = etm4x_read32(csa, TRCVISSCTLR); in etm4_cpu_save()
1703 etm4x_relaxed_write32(csa, state->trcvissctlr, TRCVISSCTLR); in etm4_cpu_restore()
|
| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/hwtracing/coresight/ |
| H A D | coresight-etm4x.h | 43 #define TRCVISSCTLR 0x088 macro
197 CASE_##op((val), TRCVISSCTLR) \
|
| H A D | coresight-etm4x-core.c | 380 etm4x_relaxed_write32(csa, config->vissctlr, TRCVISSCTLR); in etm4_enable_hw()
1590 state->trcvissctlr = etm4x_read32(csa, TRCVISSCTLR); in etm4_cpu_save()
1703 etm4x_relaxed_write32(csa, state->trcvissctlr, TRCVISSCTLR); in etm4_cpu_restore()
|
| /dports/devel/py-keystone-engine/keystone-engine-0.9.1-3/src/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.cpp | 568 {"trcvissctlr", TRCVISSCTLR, {}},
|
| H A D | AArch64BaseInfo.h | 967 TRCVISSCTLR = 0x8812, // 10 001 0000 0010 010 enumerator
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| H A D | AArch64GenSystemOperands.inc | 577 TRCVISSCTLR = 34834,
2641 { "TRCVISSCTLR", 0x8812, true, true, {} }, // 387
3761 { "TRCVISSCTLR", 387 },
|
| /dports/emulators/qemu/qemu-6.2.0/capstone/suite/synctools/tablegen/AArch64/ |
| H A D | AArch64SystemOperands.td | 895 def : RWSysReg<"TRCVISSCTLR", 0b10, 0b001, 0b0000, 0b0010, 0b010>;
|
| /dports/emulators/qemu60/qemu-6.0.0/capstone/suite/synctools/tablegen/AArch64/ |
| H A D | AArch64SystemOperands.td | 895 def : RWSysReg<"TRCVISSCTLR", 0b10, 0b001, 0b0000, 0b0010, 0b010>;
|
| /dports/emulators/qemu5/qemu-5.2.0/capstone/suite/synctools/tablegen/AArch64/ |
| H A D | AArch64SystemOperands.td | 895 def : RWSysReg<"TRCVISSCTLR", 0b10, 0b001, 0b0000, 0b0010, 0b010>;
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64SystemOperands.td | 895 def : RWSysReg<"TRCVISSCTLR", 0b10, 0b001, 0b0000, 0b0010, 0b010>;
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64SystemOperands.td | 1004 def : RWSysReg<"TRCVISSCTLR", 0b10, 0b001, 0b0000, 0b0010, 0b010>;
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AArch64/ |
| H A D | AArch64SystemOperands.td | 999 def : RWSysReg<"TRCVISSCTLR", 0b10, 0b001, 0b0000, 0b0010, 0b010>;
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64SystemOperands.td | 999 def : RWSysReg<"TRCVISSCTLR", 0b10, 0b001, 0b0000, 0b0010, 0b010>;
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64SystemOperands.td | 1047 def : RWSysReg<"TRCVISSCTLR", 0b10, 0b001, 0b0000, 0b0010, 0b010>;
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64SystemOperands.td | 999 def : RWSysReg<"TRCVISSCTLR", 0b10, 0b001, 0b0000, 0b0010, 0b010>;
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64SystemOperands.td | 999 def : RWSysReg<"TRCVISSCTLR", 0b10, 0b001, 0b0000, 0b0010, 0b010>;
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SystemOperands.td | 999 def : RWSysReg<"TRCVISSCTLR", 0b10, 0b001, 0b0000, 0b0010, 0b010>;
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64SystemOperands.td | 1047 def : RWSysReg<"TRCVISSCTLR", 0b10, 0b001, 0b0000, 0b0010, 0b010>;
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64SystemOperands.td | 998 def : RWSysReg<"TRCVISSCTLR", 0b10, 0b001, 0b0000, 0b0010, 0b010>;
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64SystemOperands.td | 999 def : RWSysReg<"TRCVISSCTLR", 0b10, 0b001, 0b0000, 0b0010, 0b010>;
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64SystemOperands.td | 1088 def : RWSysReg<"TRCVISSCTLR", 0b10, 0b001, 0b0000, 0b0010, 0b010>;
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64SystemOperands.td | 1088 def : RWSysReg<"TRCVISSCTLR", 0b10, 0b001, 0b0000, 0b0010, 0b010>;
|