| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/polly/include/polly/ |
| H A D | ScheduleOptimizer.h | 140 llvm::ArrayRef<int> TileSizes,
150 llvm::ArrayRef<int> TileSizes,
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| /dports/devel/llvm12/llvm-project-12.0.1.src/polly/include/polly/ |
| H A D | ScheduleOptimizer.h | 140 llvm::ArrayRef<int> TileSizes,
150 llvm::ArrayRef<int> TileSizes,
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| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/polly/include/polly/ |
| H A D | ScheduleOptimizer.h | 140 llvm::ArrayRef<int> TileSizes,
150 llvm::ArrayRef<int> TileSizes,
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/polly/include/polly/ |
| H A D | ScheduleOptimizer.h | 140 llvm::ArrayRef<int> TileSizes,
150 llvm::ArrayRef<int> TileSizes,
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/polly/include/polly/ |
| H A D | ScheduleOptimizer.h | 140 llvm::ArrayRef<int> TileSizes,
150 llvm::ArrayRef<int> TileSizes,
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| /dports/databases/tiledb/TileDB-2.5.2/tools/src/commands/ |
| H A D | info_command.h | 58 enum class InfoType { None, TileSizes, SVGMBRs, DumpMBRs, ArraySchema }; enumerator
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| H A D | info_command.cc | 75 (command("tile-sizes").set(type_, InfoType::TileSizes), array_arg); in get_cli()
106 case InfoType::TileSizes: in run()
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| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/polly/lib/Transform/ |
| H A D | ScheduleOptimizer.cpp | 436 ArrayRef<int> TileSizes, in tileNode() argument
443 auto tileSize = i < TileSizes.size() ? TileSizes[i] : DefaultTileSize; in tileNode()
462 isl::schedule_node Node, ArrayRef<int> TileSizes, int DefaultTileSize) { in applyRegisterTiling() argument
463 Node = tileNode(Node, "Register tiling", TileSizes, DefaultTileSize); in applyRegisterTiling()
841 std::vector<int> TileSizes(DimOutNum, 1); in createMacroKernel() local
842 TileSizes[DimOutNum - 3] = MacroKernelParams.Mc; in createMacroKernel()
843 TileSizes[DimOutNum - 2] = MacroKernelParams.Nc; in createMacroKernel()
844 TileSizes[DimOutNum - 1] = MacroKernelParams.Kc; in createMacroKernel()
845 Node = tileNode(Node, "1st level tiling", TileSizes, 1); in createMacroKernel()
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| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/polly/lib/Transform/ |
| H A D | ScheduleOptimizer.cpp | 436 ArrayRef<int> TileSizes, in tileNode() argument
443 auto tileSize = i < TileSizes.size() ? TileSizes[i] : DefaultTileSize; in tileNode()
462 isl::schedule_node Node, ArrayRef<int> TileSizes, int DefaultTileSize) { in applyRegisterTiling() argument
463 Node = tileNode(Node, "Register tiling", TileSizes, DefaultTileSize); in applyRegisterTiling()
841 std::vector<int> TileSizes(DimOutNum, 1); in createMacroKernel() local
842 TileSizes[DimOutNum - 3] = MacroKernelParams.Mc; in createMacroKernel()
843 TileSizes[DimOutNum - 2] = MacroKernelParams.Nc; in createMacroKernel()
844 TileSizes[DimOutNum - 1] = MacroKernelParams.Kc; in createMacroKernel()
845 Node = tileNode(Node, "1st level tiling", TileSizes, 1); in createMacroKernel()
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| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/polly/lib/Transform/ |
| H A D | ScheduleOptimizer.cpp | 436 ArrayRef<int> TileSizes, in tileNode() argument
443 auto tileSize = i < TileSizes.size() ? TileSizes[i] : DefaultTileSize; in tileNode()
462 isl::schedule_node Node, ArrayRef<int> TileSizes, int DefaultTileSize) { in applyRegisterTiling() argument
463 Node = tileNode(Node, "Register tiling", TileSizes, DefaultTileSize); in applyRegisterTiling()
841 std::vector<int> TileSizes(DimOutNum, 1); in createMacroKernel() local
842 TileSizes[DimOutNum - 3] = MacroKernelParams.Mc; in createMacroKernel()
843 TileSizes[DimOutNum - 2] = MacroKernelParams.Nc; in createMacroKernel()
844 TileSizes[DimOutNum - 1] = MacroKernelParams.Kc; in createMacroKernel()
845 Node = tileNode(Node, "1st level tiling", TileSizes, 1); in createMacroKernel()
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| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/polly/lib/Transform/ |
| H A D | ScheduleOptimizer.cpp | 436 ArrayRef<int> TileSizes, in tileNode() argument
443 auto tileSize = i < TileSizes.size() ? TileSizes[i] : DefaultTileSize; in tileNode()
462 isl::schedule_node Node, ArrayRef<int> TileSizes, int DefaultTileSize) { in applyRegisterTiling() argument
463 Node = tileNode(Node, "Register tiling", TileSizes, DefaultTileSize); in applyRegisterTiling()
841 std::vector<int> TileSizes(DimOutNum, 1); in createMacroKernel() local
842 TileSizes[DimOutNum - 3] = MacroKernelParams.Mc; in createMacroKernel()
843 TileSizes[DimOutNum - 2] = MacroKernelParams.Nc; in createMacroKernel()
844 TileSizes[DimOutNum - 1] = MacroKernelParams.Kc; in createMacroKernel()
845 Node = tileNode(Node, "1st level tiling", TileSizes, 1); in createMacroKernel()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/polly/lib/Transform/ |
| H A D | ScheduleOptimizer.cpp | 436 ArrayRef<int> TileSizes, in tileNode() argument
443 auto tileSize = i < TileSizes.size() ? TileSizes[i] : DefaultTileSize; in tileNode()
462 isl::schedule_node Node, ArrayRef<int> TileSizes, int DefaultTileSize) { in applyRegisterTiling() argument
463 Node = tileNode(Node, "Register tiling", TileSizes, DefaultTileSize); in applyRegisterTiling()
841 std::vector<int> TileSizes(DimOutNum, 1); in createMacroKernel() local
842 TileSizes[DimOutNum - 3] = MacroKernelParams.Mc; in createMacroKernel()
843 TileSizes[DimOutNum - 2] = MacroKernelParams.Nc; in createMacroKernel()
844 TileSizes[DimOutNum - 1] = MacroKernelParams.Kc; in createMacroKernel()
845 Node = tileNode(Node, "1st level tiling", TileSizes, 1); in createMacroKernel()
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| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/polly/include/polly/ |
| H A D | ScheduleTreeTransform.h | 215 llvm::ArrayRef<int> TileSizes, int DefaultTileSize);
224 llvm::ArrayRef<int> TileSizes,
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/polly/include/polly/ |
| H A D | ScheduleTreeTransform.h | 215 llvm::ArrayRef<int> TileSizes, int DefaultTileSize);
224 llvm::ArrayRef<int> TileSizes,
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/polly/include/polly/ |
| H A D | ScheduleTreeTransform.h | 215 llvm::ArrayRef<int> TileSizes, int DefaultTileSize);
224 llvm::ArrayRef<int> TileSizes,
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/polly/include/polly/ |
| H A D | ScheduleTreeTransform.h | 231 llvm::ArrayRef<int> TileSizes, int DefaultTileSize);
240 llvm::ArrayRef<int> TileSizes,
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/polly/lib/Transform/ |
| H A D | ScheduleTreeTransform.cpp | 690 ArrayRef<int> TileSizes, in tileNode() argument
698 i < (isl_size)TileSizes.size() ? TileSizes[i] : DefaultTileSize; in tileNode()
716 ArrayRef<int> TileSizes, in applyRegisterTiling() argument
718 Node = tileNode(Node, "Register tiling", TileSizes, DefaultTileSize); in applyRegisterTiling()
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| H A D | MatmulOptimizer.cpp | 485 std::vector<int> TileSizes(DimOutNum, 1); in createMacroKernel() local
486 TileSizes[DimOutNum - 3] = MacroKernelParams.Mc; in createMacroKernel()
487 TileSizes[DimOutNum - 2] = MacroKernelParams.Nc; in createMacroKernel()
488 TileSizes[DimOutNum - 1] = MacroKernelParams.Kc; in createMacroKernel()
489 Node = tileNode(Node, "1st level tiling", TileSizes, 1); in createMacroKernel()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/polly/lib/Transform/ |
| H A D | ScheduleTreeTransform.cpp | 690 ArrayRef<int> TileSizes, in tileNode() argument
698 i < (isl_size)TileSizes.size() ? TileSizes[i] : DefaultTileSize; in tileNode()
716 ArrayRef<int> TileSizes, in applyRegisterTiling() argument
718 Node = tileNode(Node, "Register tiling", TileSizes, DefaultTileSize); in applyRegisterTiling()
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| H A D | MatmulOptimizer.cpp | 485 std::vector<int> TileSizes(DimOutNum, 1); in createMacroKernel() local
486 TileSizes[DimOutNum - 3] = MacroKernelParams.Mc; in createMacroKernel()
487 TileSizes[DimOutNum - 2] = MacroKernelParams.Nc; in createMacroKernel()
488 TileSizes[DimOutNum - 1] = MacroKernelParams.Kc; in createMacroKernel()
489 Node = tileNode(Node, "1st level tiling", TileSizes, 1); in createMacroKernel()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/polly/lib/Transform/ |
| H A D | ScheduleTreeTransform.cpp | 690 ArrayRef<int> TileSizes, in tileNode() argument
698 i < (isl_size)TileSizes.size() ? TileSizes[i] : DefaultTileSize; in tileNode()
716 ArrayRef<int> TileSizes, in applyRegisterTiling() argument
718 Node = tileNode(Node, "Register tiling", TileSizes, DefaultTileSize); in applyRegisterTiling()
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| H A D | MatmulOptimizer.cpp | 485 std::vector<int> TileSizes(DimOutNum, 1); in createMacroKernel() local
486 TileSizes[DimOutNum - 3] = MacroKernelParams.Mc; in createMacroKernel()
487 TileSizes[DimOutNum - 2] = MacroKernelParams.Nc; in createMacroKernel()
488 TileSizes[DimOutNum - 1] = MacroKernelParams.Kc; in createMacroKernel()
489 Node = tileNode(Node, "1st level tiling", TileSizes, 1); in createMacroKernel()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/polly/lib/Transform/ |
| H A D | MatmulOptimizer.cpp | 485 std::vector<int> TileSizes(DimOutNum, 1); in createMacroKernel() local
486 TileSizes[DimOutNum - 3] = MacroKernelParams.Mc; in createMacroKernel()
487 TileSizes[DimOutNum - 2] = MacroKernelParams.Nc; in createMacroKernel()
488 TileSizes[DimOutNum - 1] = MacroKernelParams.Kc; in createMacroKernel()
489 Node = tileNode(Node, "1st level tiling", TileSizes, 1); in createMacroKernel()
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| H A D | ScheduleTreeTransform.cpp | 1181 ArrayRef<int> TileSizes, in tileNode() argument
1189 i < (isl_size)TileSizes.size() ? TileSizes[i] : DefaultTileSize; in tileNode()
1207 ArrayRef<int> TileSizes, in applyRegisterTiling() argument
1209 Node = tileNode(Node, "Register tiling", TileSizes, DefaultTileSize); in applyRegisterTiling()
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| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Frontend/OpenMP/ |
| H A D | OMPIRBuilder.cpp | 1230 ArrayRef<Value *> TileSizes) { in tileLoops() argument
1231 assert(TileSizes.size() == Loops.size() && in tileLoops()
1273 Value *TileSize = TileSizes[i]; in tileLoops()
1347 Value *TileSize = TileSizes[i]; in tileLoops()
1390 Value *Size = TileSizes[i]; in tileLoops()
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