/dports/devel/openocd/openocd-0.11.0/tcl/target/ |
H A D | c100config.tcl | 321 set UART0_LCR [regs UART0_LCR] 342 mmw $UART0_LCR $LCR_DLAB 0x0 347 mmw $UART0_LCR 0x0 $LCR_DLAB 349 mmw $UART0_LCR [expr $LCR_ONE_STOP | $LCR_CHAR_LEN_8 ] 0x0
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/dports/comms/sunxi-tools/sunxi-tools-1.4.2/ |
H A D | uart0-helloworld-sdboot.c | 357 #define UART0_LCR (SUNXI_UART0_BASE + 0xc) /* line control register */ macro 372 writel(0x80, UART0_LCR); in uart0_init() 377 writel(LC_8_N_1, UART0_LCR); in uart0_init()
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
H A D | ADSP-EDN-BF52x-extended_def.h | 39 #define UART0_LCR 0xFFC0040C /* Line Control Register */ macro
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
H A D | ADSP-EDN-BF52x-extended_def.h | 39 #define UART0_LCR 0xFFC0040C /* Line Control Register */ macro
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
H A D | ADSP-EDN-BF52x-extended_def.h | 39 #define UART0_LCR 0xFFC0040C /* Line Control Register */ macro
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
H A D | ADSP-EDN-BF52x-extended_def.h | 39 #define UART0_LCR 0xFFC0040C /* Line Control Register */ macro
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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
H A D | ADSP-EDN-BF52x-extended_def.h | 39 #define UART0_LCR 0xFFC0040C /* Line Control Register */ macro
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/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
H A D | ADSP-EDN-BF52x-extended_def.h | 39 #define UART0_LCR 0xFFC0040C /* Line Control Register */ macro
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/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-bf527/ |
H A D | BF522_def.h | 49 #define UART0_LCR 0xFFC0040C /* Line Control Register */ macro
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/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
H A D | ADSP-EDN-BF52x-extended_def.h | 39 #define UART0_LCR 0xFFC0040C /* Line Control Register */ macro
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/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-bf518/ |
H A D | BF512_def.h | 48 #define UART0_LCR 0xFFC0040C /* Line Control Register */ macro
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/dports/devel/arm-none-eabi-newlib/newlib-2.4.0/libgloss/bfin/include/ |
H A D | cdefBF535.h | 199 #define pUART0_LCR ((volatile unsigned short *)UART0_LCR)
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H A D | defBF535.h | 158 #define UART0_LCR 0xFFC01806 /* Line Control Register */ macro
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H A D | defBF59x_base.h | 81 #define UART0_LCR 0xFFC0040C /* Line Control Register */ macro
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H A D | cdefBF59x_base.h | 88 #define pUART0_LCR ((volatile uint16_t *)UART0_LCR)
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/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-bf537/ |
H A D | BF534_def.h | 41 #define UART0_LCR 0xFFC0040C /* Line Control Register */ macro
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf537/ |
H A D | ADSP-EDN-BF534-extended_def.h | 39 #define UART0_LCR 0xFFC0040C /* Line Control Register */ macro
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf537/ |
H A D | ADSP-EDN-BF534-extended_def.h | 39 #define UART0_LCR 0xFFC0040C /* Line Control Register */ macro
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf537/ |
H A D | ADSP-EDN-BF534-extended_def.h | 39 #define UART0_LCR 0xFFC0040C /* Line Control Register */ macro
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf537/ |
H A D | ADSP-EDN-BF534-extended_def.h | 39 #define UART0_LCR 0xFFC0040C /* Line Control Register */ macro
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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf537/ |
H A D | ADSP-EDN-BF534-extended_def.h | 39 #define UART0_LCR 0xFFC0040C /* Line Control Register */ macro
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/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf537/ |
H A D | ADSP-EDN-BF534-extended_def.h | 39 #define UART0_LCR 0xFFC0040C /* Line Control Register */ macro
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/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf537/ |
H A D | ADSP-EDN-BF534-extended_def.h | 39 #define UART0_LCR 0xFFC0040C /* Line Control Register */ macro
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/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-bf506/ |
H A D | BF504_def.h | 40 #define UART0_LCR 0xFFC0040C /* Line Control Register */ macro
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/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-bf538/ |
H A D | BF538_def.h | 48 #define UART0_LCR 0xFFC0040C macro
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