/dports/sysutils/u-boot-utilite/u-boot-2015.07/drivers/serial/ |
H A D | serial_mxc.c | 51 #define UCR2_SRST (1<<0) /* SW reset */ macro 192 while (!(__REG(UART_PHYS + UCR2) & UCR2_SRST)); in mxc_serial_init() 203 __REG(UART_PHYS + UCR2) = UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST; in mxc_serial_init() 270 writel(UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST, in mxc_serial_setbrg() 284 while (!(readl(&uart->cr2) & UCR2_SRST)); in mxc_serial_probe()
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/drivers/serial/ |
H A D | serial_mxc.c | 117 #define UCR2_SRST (1<<0) /* SW reset */ macro 237 while (!(__REG(UART_PHYS + UCR2) & UCR2_SRST)); in serial_init() 248 __REG(UART_PHYS + UCR2) = UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST; in serial_init()
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/drivers/serial/ |
H A D | serial_mxc.c | 117 #define UCR2_SRST (1<<0) /* SW reset */ macro 237 while (!(__REG(UART_PHYS + UCR2) & UCR2_SRST)); in serial_init() 248 __REG(UART_PHYS + UCR2) = UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST; in serial_init()
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/drivers/serial/ |
H A D | serial_mxc.c | 117 #define UCR2_SRST (1<<0) /* SW reset */ macro 237 while (!(__REG(UART_PHYS + UCR2) & UCR2_SRST)); in serial_init() 248 __REG(UART_PHYS + UCR2) = UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST; in serial_init()
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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/drivers/serial/ |
H A D | serial_mxc.c | 117 #define UCR2_SRST (1<<0) /* SW reset */ macro 237 while (!(__REG(UART_PHYS + UCR2) & UCR2_SRST)); in serial_init() 248 __REG(UART_PHYS + UCR2) = UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST; in serial_init()
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/drivers/serial/ |
H A D | serial_mxc.c | 117 #define UCR2_SRST (1<<0) /* SW reset */ macro 237 while (!(__REG(UART_PHYS + UCR2) & UCR2_SRST)); in serial_init() 248 __REG(UART_PHYS + UCR2) = UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST; in serial_init()
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/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/drivers/serial/ |
H A D | serial_mxc.c | 117 #define UCR2_SRST (1<<0) /* SW reset */ macro 237 while (!(__REG(UART_PHYS + UCR2) & UCR2_SRST)); in serial_init() 248 __REG(UART_PHYS + UCR2) = UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST; in serial_init()
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/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/drivers/serial/ |
H A D | serial_mxc.c | 117 #define UCR2_SRST (1<<0) /* SW reset */ macro 237 while (!(__REG(UART_PHYS + UCR2) & UCR2_SRST)); in serial_init() 248 __REG(UART_PHYS + UCR2) = UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST; in serial_init()
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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/serial/ |
H A D | serial_mxc.c | 50 #define UCR2_SRST (1<<0) /* SW reset */ macro 146 while (!(readl(&base->cr2) & UCR2_SRST)); in _mxc_serial_init() 171 writel(UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST, in _mxc_serial_setbrg()
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/serial/ |
H A D | serial_mxc.c | 50 #define UCR2_SRST (1<<0) /* SW reset */ macro 146 while (!(readl(&base->cr2) & UCR2_SRST)); in _mxc_serial_init() 171 writel(UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST, in _mxc_serial_setbrg()
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/serial/ |
H A D | serial_mxc.c | 50 #define UCR2_SRST (1<<0) /* SW reset */ macro 146 while (!(readl(&base->cr2) & UCR2_SRST)); in _mxc_serial_init() 171 writel(UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST, in _mxc_serial_setbrg()
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/serial/ |
H A D | serial_mxc.c | 50 #define UCR2_SRST (1<<0) /* SW reset */ macro 146 while (!(readl(&base->cr2) & UCR2_SRST)); in _mxc_serial_init() 171 writel(UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST, in _mxc_serial_setbrg()
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/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/drivers/serial/ |
H A D | serial_mxc.c | 50 #define UCR2_SRST (1<<0) /* SW reset */ macro 146 while (!(readl(&base->cr2) & UCR2_SRST)); in _mxc_serial_init() 171 writel(UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST, in _mxc_serial_setbrg()
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/dports/emulators/qemu42/qemu-4.2.1/hw/char/ |
H A D | imx_serial.c | 100 s->ucr2 = UCR2_SRST; in imx_serial_reset() 228 if (!(value & UCR2_SRST)) { in imx_serial_write() 231 value |= UCR2_SRST; in imx_serial_write()
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/dports/emulators/qemu/qemu-6.2.0/hw/char/ |
H A D | imx_serial.c | 101 s->ucr2 = UCR2_SRST; in imx_serial_reset() 229 if (!(value & UCR2_SRST)) { in imx_serial_write() 232 value |= UCR2_SRST; in imx_serial_write()
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/dports/emulators/qemu60/qemu-6.0.0/hw/char/ |
H A D | imx_serial.c | 101 s->ucr2 = UCR2_SRST; in imx_serial_reset() 229 if (!(value & UCR2_SRST)) { in imx_serial_write() 232 value |= UCR2_SRST; in imx_serial_write()
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/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/drivers/serial/ |
H A D | serial_mxc.c | 51 #define UCR2_SRST (1<<0) /* SW reset */ macro 147 while (!(readl(&base->cr2) & UCR2_SRST)); in _mxc_serial_init() 177 writel(UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST, in _mxc_serial_setbrg()
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/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/serial/ |
H A D | serial_mxc.c | 51 #define UCR2_SRST (1<<0) /* SW reset */ macro 147 while (!(readl(&base->cr2) & UCR2_SRST)); in _mxc_serial_init() 177 writel(UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST, in _mxc_serial_setbrg()
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/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/serial/ |
H A D | serial_mxc.c | 51 #define UCR2_SRST (1<<0) /* SW reset */ macro 147 while (!(readl(&base->cr2) & UCR2_SRST)); in _mxc_serial_init() 177 writel(UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST, in _mxc_serial_setbrg()
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/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/serial/ |
H A D | serial_mxc.c | 51 #define UCR2_SRST (1<<0) /* SW reset */ macro 147 while (!(readl(&base->cr2) & UCR2_SRST)); in _mxc_serial_init() 177 writel(UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST, in _mxc_serial_setbrg()
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/char/ |
H A D | imx_serial.c | 97 s->ucr2 = UCR2_SRST; in imx_serial_reset() 225 if (!(value & UCR2_SRST)) { in imx_serial_write() 228 value |= UCR2_SRST; in imx_serial_write()
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/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/serial/ |
H A D | serial_mxc.c | 51 #define UCR2_SRST (1<<0) /* SW reset */ macro 147 while (!(readl(&base->cr2) & UCR2_SRST)); in _mxc_serial_init() 177 writel(UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST, in _mxc_serial_setbrg()
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/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/serial/ |
H A D | serial_mxc.c | 51 #define UCR2_SRST (1<<0) /* SW reset */ macro 147 while (!(readl(&base->cr2) & UCR2_SRST)); in _mxc_serial_init() 177 writel(UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST, in _mxc_serial_setbrg()
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/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/serial/ |
H A D | serial_mxc.c | 51 #define UCR2_SRST (1<<0) /* SW reset */ macro 147 while (!(readl(&base->cr2) & UCR2_SRST)); in _mxc_serial_init() 177 writel(UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST, in _mxc_serial_setbrg()
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/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/serial/ |
H A D | serial_mxc.c | 51 #define UCR2_SRST (1<<0) /* SW reset */ macro 147 while (!(readl(&base->cr2) & UCR2_SRST)); in _mxc_serial_init() 177 writel(UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST, in _mxc_serial_setbrg()
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