| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 290 #define UCR3_RI BIT(8) /* RIDELT DTE mode */ macro
302 clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
303 clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
304 clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
305 clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 290 #define UCR3_RI BIT(8) /* RIDELT DTE mode */ macro
302 clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
303 clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
304 clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
305 clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 290 #define UCR3_RI BIT(8) /* RIDELT DTE mode */ macro
302 clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
303 clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
304 clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
305 clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 290 #define UCR3_RI BIT(8) /* RIDELT DTE mode */ macro
302 clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
303 clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
304 clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
305 clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 290 #define UCR3_RI BIT(8) /* RIDELT DTE mode */ macro
302 clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
303 clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
304 clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
305 clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 290 #define UCR3_RI BIT(8) /* RIDELT DTE mode */ macro
302 clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
303 clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
304 clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
305 clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 290 #define UCR3_RI BIT(8) /* RIDELT DTE mode */ macro
302 clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
303 clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
304 clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
305 clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 290 #define UCR3_RI BIT(8) /* RIDELT DTE mode */ macro
302 clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
303 clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
304 clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
305 clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 290 #define UCR3_RI BIT(8) /* RIDELT DTE mode */ macro
302 clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
303 clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
304 clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
305 clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 290 #define UCR3_RI BIT(8) /* RIDELT DTE mode */ macro
302 clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
303 clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
304 clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
305 clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 290 #define UCR3_RI BIT(8) /* RIDELT DTE mode */ macro
302 clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
303 clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
304 clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
305 clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 290 #define UCR3_RI BIT(8) /* RIDELT DTE mode */ macro
302 clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
303 clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
304 clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
305 clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 290 #define UCR3_RI BIT(8) /* RIDELT DTE mode */ macro
302 clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
303 clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
304 clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
305 clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 290 #define UCR3_RI BIT(8) /* RIDELT DTE mode */ macro
302 clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
303 clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
304 clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
305 clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
|
| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 290 #define UCR3_RI BIT(8) /* RIDELT DTE mode */ macro
302 clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
303 clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
304 clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
305 clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
|
| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 290 #define UCR3_RI BIT(8) /* RIDELT DTE mode */ macro
302 clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
303 clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
304 clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
305 clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
|
| /dports/sysutils/u-boot-chip/u-boot-2021.07/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 290 #define UCR3_RI BIT(8) /* RIDELT DTE mode */ macro
302 clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
303 clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
304 clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
305 clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
|
| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 290 #define UCR3_RI BIT(8) /* RIDELT DTE mode */ macro
302 clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
303 clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
304 clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
305 clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
|
| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 290 #define UCR3_RI BIT(8) /* RIDELT DTE mode */ macro
302 clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
303 clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
304 clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
305 clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
|
| /dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 290 #define UCR3_RI BIT(8) /* RIDELT DTE mode */ macro
302 clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
303 clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
304 clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
305 clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
|
| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 290 #define UCR3_RI BIT(8) /* RIDELT DTE mode */ macro
302 clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
303 clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
304 clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
305 clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
|
| /dports/sysutils/u-boot-pine-h64/u-boot-2021.07/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 290 #define UCR3_RI BIT(8) /* RIDELT DTE mode */ macro
302 clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
303 clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
304 clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
305 clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
|
| /dports/sysutils/u-boot-pcduino3/u-boot-2021.07/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 290 #define UCR3_RI BIT(8) /* RIDELT DTE mode */ macro
302 clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
303 clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
304 clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
305 clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
|
| /dports/sysutils/u-boot-pinebook/u-boot-2021.07/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 290 #define UCR3_RI BIT(8) /* RIDELT DTE mode */ macro
302 clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
303 clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
304 clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
305 clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
|
| /dports/sysutils/u-boot-pinebookpro/u-boot-2021.07/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 290 #define UCR3_RI BIT(8) /* RIDELT DTE mode */ macro
302 clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
303 clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
304 clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
305 clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); in setup_dtemode_uart()
|