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Searched refs:UREG_XYZW_CHANNEL_MASK (Results 1 – 22 of 22) sorted by relevance

/dports/lang/clover/mesa-21.3.6/src/mesa/drivers/dri/i915/
H A Di915_program.h83 #define UREG_XYZW_CHANNEL_MASK 0x00ffff00 macro
90 return ((reg & ~UREG_XYZW_CHANNEL_MASK) | in swizzle()
/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/mesa/drivers/dri/i915/
H A Di915_program.h83 #define UREG_XYZW_CHANNEL_MASK 0x00ffff00 macro
90 return ((reg & ~UREG_XYZW_CHANNEL_MASK) | in swizzle()
/dports/graphics/libosmesa/mesa-21.3.6/src/mesa/drivers/dri/i915/
H A Di915_program.h83 #define UREG_XYZW_CHANNEL_MASK 0x00ffff00 macro
90 return ((reg & ~UREG_XYZW_CHANNEL_MASK) | in swizzle()
/dports/graphics/mesa-libs/mesa-21.3.6/src/mesa/drivers/dri/i915/
H A Di915_program.h83 #define UREG_XYZW_CHANNEL_MASK 0x00ffff00 macro
90 return ((reg & ~UREG_XYZW_CHANNEL_MASK) | in swizzle()
/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/mesa/drivers/dri/i915/
H A Di915_program.h83 #define UREG_XYZW_CHANNEL_MASK 0x00ffff00 macro
90 return ((reg & ~UREG_XYZW_CHANNEL_MASK) | in swizzle()
/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/mesa/drivers/dri/i915/
H A Di915_program.h83 #define UREG_XYZW_CHANNEL_MASK 0x00ffff00 macro
90 return ((reg & ~UREG_XYZW_CHANNEL_MASK) | in swizzle()
/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/mesa/drivers/dri/i915/
H A Di915_program.h83 #define UREG_XYZW_CHANNEL_MASK 0x00ffff00 macro
90 return ((reg & ~UREG_XYZW_CHANNEL_MASK) | in swizzle()
/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/mesa/drivers/dri/i915/
H A Di915_program.h83 #define UREG_XYZW_CHANNEL_MASK 0x00ffff00 macro
90 return ((reg & ~UREG_XYZW_CHANNEL_MASK) | in swizzle()
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/mesa/drivers/dri/i915/
H A Di915_program.h83 #define UREG_XYZW_CHANNEL_MASK 0x00ffff00 macro
90 return ((reg & ~UREG_XYZW_CHANNEL_MASK) | in swizzle()
/dports/graphics/mesa-dri/mesa-21.3.6/src/mesa/drivers/dri/i915/
H A Di915_program.h83 #define UREG_XYZW_CHANNEL_MASK 0x00ffff00 macro
90 return ((reg & ~UREG_XYZW_CHANNEL_MASK) | in swizzle()
/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/gallium/drivers/i915/
H A Di915_fpc.h125 #define UREG_XYZW_CHANNEL_MASK 0x00ffff00 macro
136 return ((reg & ~UREG_XYZW_CHANNEL_MASK) | in swizzle()
/dports/lang/clover/mesa-21.3.6/src/gallium/drivers/i915/
H A Di915_fpc.h125 #define UREG_XYZW_CHANNEL_MASK 0x00ffff00 macro
136 return ((reg & ~UREG_XYZW_CHANNEL_MASK) | in swizzle()
/dports/graphics/libosmesa/mesa-21.3.6/src/gallium/drivers/i915/
H A Di915_fpc.h125 #define UREG_XYZW_CHANNEL_MASK 0x00ffff00 macro
136 return ((reg & ~UREG_XYZW_CHANNEL_MASK) | in swizzle()
/dports/graphics/mesa-libs/mesa-21.3.6/src/gallium/drivers/i915/
H A Di915_fpc.h125 #define UREG_XYZW_CHANNEL_MASK 0x00ffff00 macro
136 return ((reg & ~UREG_XYZW_CHANNEL_MASK) | in swizzle()
/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/gallium/drivers/i915/
H A Di915_fpc.h125 #define UREG_XYZW_CHANNEL_MASK 0x00ffff00 macro
136 return ((reg & ~UREG_XYZW_CHANNEL_MASK) | in swizzle()
/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/gallium/drivers/i915/
H A Di915_fpc.h125 #define UREG_XYZW_CHANNEL_MASK 0x00ffff00 macro
136 return ((reg & ~UREG_XYZW_CHANNEL_MASK) | in swizzle()
/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/gallium/drivers/i915/
H A Di915_fpc.h125 #define UREG_XYZW_CHANNEL_MASK 0x00ffff00 macro
136 return ((reg & ~UREG_XYZW_CHANNEL_MASK) | in swizzle()
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/gallium/drivers/i915/
H A Di915_fpc.h125 #define UREG_XYZW_CHANNEL_MASK 0x00ffff00 macro
136 return ((reg & ~UREG_XYZW_CHANNEL_MASK) | in swizzle()
/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/gallium/drivers/i915/
H A Di915_fpc.h125 #define UREG_XYZW_CHANNEL_MASK 0x00ffff00 macro
136 return ((reg & ~UREG_XYZW_CHANNEL_MASK) | in swizzle()
/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/gallium/drivers/i915/
H A Di915_fpc.h135 #define UREG_XYZW_CHANNEL_MASK 0x00ffff00 macro
146 return ((reg & ~UREG_XYZW_CHANNEL_MASK) | in swizzle()
/dports/graphics/mesa-dri/mesa-21.3.6/src/gallium/drivers/i915/
H A Di915_fpc.h125 #define UREG_XYZW_CHANNEL_MASK 0x00ffff00 macro
136 return ((reg & ~UREG_XYZW_CHANNEL_MASK) | in swizzle()
/dports/x11-drivers/xf86-video-intel/xf86-video-intel-31486f40f8e8f8923ca0799aea84b58799754564/xvmc/
H A Di915_program.h243 #define UREG_XYZW_CHANNEL_MASK 0x00ffff00 macro