UTRSTAT_Rx_BUFFER_DATA_READY (reference) in projects: dports

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Searched refs:UTRSTAT_Rx_BUFFER_DATA_READY (Results 1 – 9 of 9) sorted by relevance

/dports/emulators/qemu/qemu-6.2.0/hw/char/
H A D	exynos4210_uart.c	128 #define UTRSTAT_Rx_BUFFER_DATA_READY 0x1 macro 310 } else if (s->reg[I_(UTRSTAT)] & UTRSTAT_Rx_BUFFER_DATA_READY) { in exynos4210_uart_update_irq() 333 if ((s->reg[I_(UTRSTAT)] & UTRSTAT_Rx_BUFFER_DATA_READY) \|\| in exynos4210_uart_timeout_int() 508 s->reg[I_(UTRSTAT)] &= ~UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 510 s->reg[I_(UTRSTAT)] \|= UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 519 s->reg[I_(UTRSTAT)] &= ~UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 560 return !(s->reg[I_(UTRSTAT)] & UTRSTAT_Rx_BUFFER_DATA_READY); in exynos4210_uart_can_receive() 581 s->reg[I_(UTRSTAT)] \|= UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_receive()
/dports/emulators/qemu60/qemu-6.0.0/hw/char/
H A D	exynos4210_uart.c	128 #define UTRSTAT_Rx_BUFFER_DATA_READY 0x1 macro 310 } else if (s->reg[I_(UTRSTAT)] & UTRSTAT_Rx_BUFFER_DATA_READY) { in exynos4210_uart_update_irq() 333 if ((s->reg[I_(UTRSTAT)] & UTRSTAT_Rx_BUFFER_DATA_READY) \|\| in exynos4210_uart_timeout_int() 508 s->reg[I_(UTRSTAT)] &= ~UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 510 s->reg[I_(UTRSTAT)] \|= UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 519 s->reg[I_(UTRSTAT)] &= ~UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 560 return !(s->reg[I_(UTRSTAT)] & UTRSTAT_Rx_BUFFER_DATA_READY); in exynos4210_uart_can_receive() 581 s->reg[I_(UTRSTAT)] \|= UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_receive()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/char/
H A D	exynos4210_uart.c	128 #define UTRSTAT_Rx_BUFFER_DATA_READY 0x1 macro 310 } else if (s->reg[I_(UTRSTAT)] & UTRSTAT_Rx_BUFFER_DATA_READY) { in exynos4210_uart_update_irq() 333 if ((s->reg[I_(UTRSTAT)] & UTRSTAT_Rx_BUFFER_DATA_READY) \|\| in exynos4210_uart_timeout_int() 508 s->reg[I_(UTRSTAT)] &= ~UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 510 s->reg[I_(UTRSTAT)] \|= UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 519 s->reg[I_(UTRSTAT)] &= ~UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 560 return !(s->reg[I_(UTRSTAT)] & UTRSTAT_Rx_BUFFER_DATA_READY); in exynos4210_uart_can_receive() 581 s->reg[I_(UTRSTAT)] \|= UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_receive()
/dports/emulators/qemu42/qemu-4.2.1/hw/char/
H A D	exynos4210_uart.c	161 #define UTRSTAT_Rx_BUFFER_DATA_READY 0x1 macro 458 s->reg[I_(UTRSTAT)] &= ~UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 460 s->reg[I_(UTRSTAT)] \|= UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 468 s->reg[I_(UTRSTAT)] &= ~UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 512 s->reg[I_(UTRSTAT)] \|= UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_receive() 517 s->reg[I_(UTRSTAT)] \|= UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_receive() 524 s->reg[I_(UTRSTAT)] \|= UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_receive()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/char/
H A D	exynos4210_uart.c	158 #define UTRSTAT_Rx_BUFFER_DATA_READY 0x1 macro 455 s->reg[I_(UTRSTAT)] &= ~UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 457 s->reg[I_(UTRSTAT)] \|= UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 465 s->reg[I_(UTRSTAT)] &= ~UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 509 s->reg[I_(UTRSTAT)] \|= UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_receive() 514 s->reg[I_(UTRSTAT)] \|= UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_receive() 521 s->reg[I_(UTRSTAT)] \|= UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_receive()
/dports/emulators/qemu-utils/qemu-4.2.1/hw/char/
H A D	exynos4210_uart.c	161 #define UTRSTAT_Rx_BUFFER_DATA_READY 0x1 macro 458 s->reg[I_(UTRSTAT)] &= ~UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 460 s->reg[I_(UTRSTAT)] \|= UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 468 s->reg[I_(UTRSTAT)] &= ~UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 512 s->reg[I_(UTRSTAT)] \|= UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_receive() 517 s->reg[I_(UTRSTAT)] \|= UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_receive() 524 s->reg[I_(UTRSTAT)] \|= UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_receive()
/dports/emulators/qemu5/qemu-5.2.0/hw/char/
H A D	exynos4210_uart.c	127 #define UTRSTAT_Rx_BUFFER_DATA_READY 0x1 macro 309 } else if (s->reg[I_(UTRSTAT)] & UTRSTAT_Rx_BUFFER_DATA_READY) { in exynos4210_uart_update_irq() 332 if ((s->reg[I_(UTRSTAT)] & UTRSTAT_Rx_BUFFER_DATA_READY) \|\| in exynos4210_uart_timeout_int() 507 s->reg[I_(UTRSTAT)] &= ~UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 509 s->reg[I_(UTRSTAT)] \|= UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 518 s->reg[I_(UTRSTAT)] &= ~UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 575 s->reg[I_(UTRSTAT)] \|= UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_receive()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/char/
H A D	exynos4210_uart.c	125 #define UTRSTAT_Rx_BUFFER_DATA_READY 0x1 macro 308 } else if (s->reg[I_(UTRSTAT)] & UTRSTAT_Rx_BUFFER_DATA_READY) { in exynos4210_uart_update_irq() 331 if ((s->reg[I_(UTRSTAT)] & UTRSTAT_Rx_BUFFER_DATA_READY) \|\| in exynos4210_uart_timeout_int() 506 s->reg[I_(UTRSTAT)] &= ~UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 508 s->reg[I_(UTRSTAT)] \|= UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 517 s->reg[I_(UTRSTAT)] &= ~UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 574 s->reg[I_(UTRSTAT)] \|= UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_receive()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/char/
H A D	exynos4210_uart.c	125 #define UTRSTAT_Rx_BUFFER_DATA_READY 0x1 macro 308 } else if (s->reg[I_(UTRSTAT)] & UTRSTAT_Rx_BUFFER_DATA_READY) { in exynos4210_uart_update_irq() 331 if ((s->reg[I_(UTRSTAT)] & UTRSTAT_Rx_BUFFER_DATA_READY) \|\| in exynos4210_uart_timeout_int() 506 s->reg[I_(UTRSTAT)] &= ~UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 508 s->reg[I_(UTRSTAT)] \|= UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 517 s->reg[I_(UTRSTAT)] &= ~UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_read() 574 s->reg[I_(UTRSTAT)] \|= UTRSTAT_Rx_BUFFER_DATA_READY; in exynos4210_uart_receive()