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Searched refs:Upl (Results 1 – 25 of 215) sorted by relevance

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/dports/lang/gcc10-devel/gcc-10-20211008/gcc/config/aarch64/
H A D	aarch64-sve.md	1423 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1552 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1705 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1811 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1978 [(match_operand:VNx4BI 0 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 2256 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 2379 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 5280 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl, Upl") 5357 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 5395 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") [all …]
H A D	aarch64-sve2.md	107 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 333 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 421 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl") 531 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl") 571 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl") 623 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl, Upl, Upl, Upl") 2012 [(match_operand:<VWIDE_PRED> 1 "register_operand" "Upl, Upl, Upl") 2035 [(match_operand:<VWIDE_PRED> 1 "register_operand" "Upl, Upl, Upl") 2118 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 2179 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") [all …]
/dports/lang/gcc10/gcc-10.3.0/gcc/config/aarch64/
H A D	aarch64-sve.md	1423 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1552 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1705 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1811 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1978 [(match_operand:VNx4BI 0 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 2256 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 2379 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 5280 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl, Upl") 5357 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 5395 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") [all …]
H A D	aarch64-sve2.md	107 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 333 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 421 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl") 531 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl") 571 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl") 623 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl, Upl, Upl, Upl") 2012 [(match_operand:<VWIDE_PRED> 1 "register_operand" "Upl, Upl, Upl") 2035 [(match_operand:<VWIDE_PRED> 1 "register_operand" "Upl, Upl, Upl") 2118 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 2179 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") [all …]
/dports/lang/gcc12-devel/gcc-12-20211205/gcc/config/aarch64/
H A D	aarch64-sve.md	1423 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1552 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1705 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1811 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1978 [(match_operand:VNx4BI 0 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 2256 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 2379 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 5374 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl, Upl") 5451 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 5489 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") [all …]
H A D	aarch64-sve2.md	107 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 333 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 421 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl") 531 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl") 571 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl") 623 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl, Upl, Upl, Upl") 2064 [(match_operand:<VWIDE_PRED> 1 "register_operand" "Upl, Upl, Upl") 2087 [(match_operand:<VWIDE_PRED> 1 "register_operand" "Upl, Upl, Upl") 2170 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 2231 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") [all …]
/dports/lang/gcc11-devel/gcc-11-20211009/gcc/config/aarch64/
H A D	aarch64-sve.md	1423 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1552 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1705 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1811 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1978 [(match_operand:VNx4BI 0 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 2256 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 2379 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 5374 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl, Upl") 5451 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 5489 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") [all …]
H A D	aarch64-sve2.md	107 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 333 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 421 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl") 531 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl") 571 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl") 623 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl, Upl, Upl, Upl") 2064 [(match_operand:<VWIDE_PRED> 1 "register_operand" "Upl, Upl, Upl") 2087 [(match_operand:<VWIDE_PRED> 1 "register_operand" "Upl, Upl, Upl") 2170 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 2231 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") [all …]
/dports/lang/gcc11/gcc-11.2.0/gcc/config/aarch64/
H A D	aarch64-sve.md	1423 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1552 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1705 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1811 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1978 [(match_operand:VNx4BI 0 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 2256 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 2379 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 5374 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl, Upl") 5451 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 5489 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") [all …]
H A D	aarch64-sve2.md	107 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 333 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 421 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl") 531 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl") 571 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl") 623 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl, Upl, Upl, Upl") 2064 [(match_operand:<VWIDE_PRED> 1 "register_operand" "Upl, Upl, Upl") 2087 [(match_operand:<VWIDE_PRED> 1 "register_operand" "Upl, Upl, Upl") 2170 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 2231 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") [all …]
/dports/misc/cxx_atomics_pic/gcc-11.2.0/gcc/config/aarch64/
H A D	aarch64-sve.md	1423 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1552 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1705 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1811 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1978 [(match_operand:VNx4BI 0 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 2256 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 2379 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 5374 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl, Upl") 5451 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 5489 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") [all …]
H A D	aarch64-sve2.md	107 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 333 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 421 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl") 531 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl") 571 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl") 623 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl, Upl, Upl, Upl") 2064 [(match_operand:<VWIDE_PRED> 1 "register_operand" "Upl, Upl, Upl") 2087 [(match_operand:<VWIDE_PRED> 1 "register_operand" "Upl, Upl, Upl") 2170 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 2231 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") [all …]
/dports/lang/gcc9/gcc-9.4.0/gcc/config/aarch64/
H A D	aarch64-sve.md	176 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 244 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl, Upl, Upl") 265 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl") 301 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl, Upl, Upl") 322 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl") 410 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 946 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 1061 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 1260 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 1879 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") [all …]
/dports/lang/gcc9-aux/gcc-9.1.0/gcc/config/aarch64/
H A D	aarch64-sve.md	176 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 244 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl, Upl, Upl") 265 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl") 301 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl, Upl, Upl") 322 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl") 410 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 946 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 1061 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 1260 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 1879 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") [all …]
/dports/lang/gcc9-devel/gcc-9-20211007/gcc/config/aarch64/
H A D	aarch64-sve.md	176 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 244 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl, Upl, Upl") 265 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl") 301 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl, Upl, Upl") 322 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl") 410 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 946 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 1061 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 1260 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 1879 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") [all …]
/dports/devel/avr-gcc/gcc-10.2.0/gcc/config/aarch64/
H A D	aarch64-sve.md	1334 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1463 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1616 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1722 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 1889 [(match_operand:VNx4BI 0 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 2167 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 2290 [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 4978 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl, Upl") 5034 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") 5187 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl") [all …]
H A D	aarch64-sve2.md	107 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 156 [(match_operand:<VPRED> 0 "register_operand" "Upl, Upl") 333 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") 371 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 421 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl") 531 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl") 571 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl") 623 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl, Upl, Upl, Upl") 1969 [(match_operand:<VWIDE_PRED> 1 "register_operand" "Upl, Upl, Upl") 2055 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") [all …]
/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/config/aarch64/
H A D	aarch64-sve.md	176 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 240 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl, Upl, Upl") 261 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl") 297 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl, Upl, Upl") 318 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl") 406 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 609 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 942 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 1197 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 1813 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") [all …]
/dports/devel/riscv64-gcc/gcc-8.3.0/gcc/config/aarch64/
H A D	aarch64-sve.md	176 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 240 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl, Upl, Upl") 261 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl") 297 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl, Upl, Upl") 318 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl") 406 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 609 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 942 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 1197 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 1813 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") [all …]
/dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/config/aarch64/
H A D	aarch64-sve.md	176 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 240 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl, Upl, Upl") 261 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl") 297 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl, Upl, Upl") 318 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl") 406 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 609 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 942 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 1197 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 1813 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") [all …]
/dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/config/aarch64/
H A D	aarch64-sve.md	176 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 240 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl, Upl, Upl") 261 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl") 297 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl, Upl, Upl") 318 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl") 406 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 609 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 942 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 1197 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 1813 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") [all …]
/dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/config/aarch64/
H A D	aarch64-sve.md	176 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 240 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl, Upl, Upl") 261 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl") 297 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl, Upl, Upl") 318 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl") 406 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 609 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 942 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 1197 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 1813 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") [all …]
/dports/lang/gcc8/gcc-8.5.0/gcc/config/aarch64/
H A D	aarch64-sve.md	176 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 240 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl, Upl, Upl") 261 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl") 297 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl, Upl, Upl") 318 [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl") 406 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 609 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 942 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 1197 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl") 1813 [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl") [all …]
/dports/devel/plan9port/plan9port-1f098efb7370a0b28306d10681e21883fb1c1507/src/cmd/htmlroff/
H A D	char.c	`68 "pl", Upl,`
H A D	a.h	`18 Upl, /* symbol + */ enumerator`

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