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Searched refs:UvdLevel (Results 1 – 25 of 52) sorted by relevance

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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dvegam_smumgr.c1325 table->UvdLevel[count].MinVoltage = 0; in vegam_populate_smc_uvd_level()
1326 table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk; in vegam_populate_smc_uvd_level()
1327 table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk; in vegam_populate_smc_uvd_level()
1328 table->UvdLevel[count].MinVoltage |= in vegam_populate_smc_uvd_level()
1340 table->UvdLevel[count].MinVoltage |= 1 << PHASES_SHIFT; in vegam_populate_smc_uvd_level()
1344 table->UvdLevel[count].VclkFrequency, &dividers); in vegam_populate_smc_uvd_level()
1348 table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider; in vegam_populate_smc_uvd_level()
1351 table->UvdLevel[count].DclkFrequency, &dividers); in vegam_populate_smc_uvd_level()
1357 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency); in vegam_populate_smc_uvd_level()
1358 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].DclkFrequency); in vegam_populate_smc_uvd_level()
[all …]
H A Dfiji_smumgr.c1568 table->UvdLevel[count].MinVoltage = 0; in fiji_populate_smc_uvd_level()
1569 table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk; in fiji_populate_smc_uvd_level()
1570 table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk; in fiji_populate_smc_uvd_level()
1571 table->UvdLevel[count].MinVoltage |= (mm_table->entries[count].vddc * in fiji_populate_smc_uvd_level()
1573 table->UvdLevel[count].MinVoltage |= ((mm_table->entries[count].vddc - in fiji_populate_smc_uvd_level()
1575 table->UvdLevel[count].MinVoltage |= 1 << PHASES_SHIFT; in fiji_populate_smc_uvd_level()
1579 table->UvdLevel[count].VclkFrequency, &dividers); in fiji_populate_smc_uvd_level()
1586 table->UvdLevel[count].DclkFrequency, &dividers); in fiji_populate_smc_uvd_level()
1592 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency); in fiji_populate_smc_uvd_level()
1593 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].DclkFrequency); in fiji_populate_smc_uvd_level()
[all …]
H A Dpolaris10_smumgr.c1537 table->UvdLevel[count].MinVoltage = 0; in polaris10_populate_smc_uvd_level()
1538 table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk; in polaris10_populate_smc_uvd_level()
1539 table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk; in polaris10_populate_smc_uvd_level()
1540 table->UvdLevel[count].MinVoltage |= (mm_table->entries[count].vddc * in polaris10_populate_smc_uvd_level()
1552 table->UvdLevel[count].MinVoltage |= 1 << PHASES_SHIFT; in polaris10_populate_smc_uvd_level()
1556 table->UvdLevel[count].VclkFrequency, &dividers); in polaris10_populate_smc_uvd_level()
1560 table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider; in polaris10_populate_smc_uvd_level()
1563 table->UvdLevel[count].DclkFrequency, &dividers); in polaris10_populate_smc_uvd_level()
1569 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency); in polaris10_populate_smc_uvd_level()
1570 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].DclkFrequency); in polaris10_populate_smc_uvd_level()
[all …]
H A Dtonga_smumgr.c1324 table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk; in tonga_populate_smc_uvd_level()
1325 table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk; in tonga_populate_smc_uvd_level()
1326 table->UvdLevel[count].MinVoltage.Vddc = in tonga_populate_smc_uvd_level()
1329 table->UvdLevel[count].MinVoltage.VddGfx = in tonga_populate_smc_uvd_level()
1333 table->UvdLevel[count].MinVoltage.Vddci = in tonga_populate_smc_uvd_level()
1336 table->UvdLevel[count].MinVoltage.Phases = 1; in tonga_populate_smc_uvd_level()
1341 table->UvdLevel[count].VclkFrequency, in tonga_populate_smc_uvd_level()
1351 table->UvdLevel[count].DclkFrequency, &dividers); in tonga_populate_smc_uvd_level()
1356 table->UvdLevel[count].DclkDivider = in tonga_populate_smc_uvd_level()
1359 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency); in tonga_populate_smc_uvd_level()
[all …]
H A Dci_smumgr.c1529 table->UvdLevel[count].VclkFrequency = in ci_populate_smc_uvd_level()
1531 table->UvdLevel[count].DclkFrequency = in ci_populate_smc_uvd_level()
1533 table->UvdLevel[count].MinVddc = in ci_populate_smc_uvd_level()
1535 table->UvdLevel[count].MinVddcPhases = 1; in ci_populate_smc_uvd_level()
1538 table->UvdLevel[count].VclkFrequency, &dividers); in ci_populate_smc_uvd_level()
1542 table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider; in ci_populate_smc_uvd_level()
1545 table->UvdLevel[count].DclkFrequency, &dividers); in ci_populate_smc_uvd_level()
1549 table->UvdLevel[count].DclkDivider = (uint8_t)dividers.pll_post_divider; in ci_populate_smc_uvd_level()
1550 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency); in ci_populate_smc_uvd_level()
1551 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].DclkFrequency); in ci_populate_smc_uvd_level()
[all …]
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dvegam_smumgr.c1325 table->UvdLevel[count].MinVoltage = 0; in vegam_populate_smc_uvd_level()
1326 table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk; in vegam_populate_smc_uvd_level()
1327 table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk; in vegam_populate_smc_uvd_level()
1328 table->UvdLevel[count].MinVoltage |= in vegam_populate_smc_uvd_level()
1340 table->UvdLevel[count].MinVoltage |= 1 << PHASES_SHIFT; in vegam_populate_smc_uvd_level()
1344 table->UvdLevel[count].VclkFrequency, &dividers); in vegam_populate_smc_uvd_level()
1348 table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider; in vegam_populate_smc_uvd_level()
1351 table->UvdLevel[count].DclkFrequency, &dividers); in vegam_populate_smc_uvd_level()
1357 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency); in vegam_populate_smc_uvd_level()
1358 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].DclkFrequency); in vegam_populate_smc_uvd_level()
[all …]
H A Dfiji_smumgr.c1568 table->UvdLevel[count].MinVoltage = 0; in fiji_populate_smc_uvd_level()
1569 table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk; in fiji_populate_smc_uvd_level()
1570 table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk; in fiji_populate_smc_uvd_level()
1571 table->UvdLevel[count].MinVoltage |= (mm_table->entries[count].vddc * in fiji_populate_smc_uvd_level()
1573 table->UvdLevel[count].MinVoltage |= ((mm_table->entries[count].vddc - in fiji_populate_smc_uvd_level()
1575 table->UvdLevel[count].MinVoltage |= 1 << PHASES_SHIFT; in fiji_populate_smc_uvd_level()
1579 table->UvdLevel[count].VclkFrequency, &dividers); in fiji_populate_smc_uvd_level()
1586 table->UvdLevel[count].DclkFrequency, &dividers); in fiji_populate_smc_uvd_level()
1592 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency); in fiji_populate_smc_uvd_level()
1593 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].DclkFrequency); in fiji_populate_smc_uvd_level()
[all …]
H A Dpolaris10_smumgr.c1537 table->UvdLevel[count].MinVoltage = 0; in polaris10_populate_smc_uvd_level()
1538 table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk; in polaris10_populate_smc_uvd_level()
1539 table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk; in polaris10_populate_smc_uvd_level()
1540 table->UvdLevel[count].MinVoltage |= (mm_table->entries[count].vddc * in polaris10_populate_smc_uvd_level()
1552 table->UvdLevel[count].MinVoltage |= 1 << PHASES_SHIFT; in polaris10_populate_smc_uvd_level()
1556 table->UvdLevel[count].VclkFrequency, &dividers); in polaris10_populate_smc_uvd_level()
1560 table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider; in polaris10_populate_smc_uvd_level()
1563 table->UvdLevel[count].DclkFrequency, &dividers); in polaris10_populate_smc_uvd_level()
1569 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency); in polaris10_populate_smc_uvd_level()
1570 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].DclkFrequency); in polaris10_populate_smc_uvd_level()
[all …]
H A Dtonga_smumgr.c1324 table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk; in tonga_populate_smc_uvd_level()
1325 table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk; in tonga_populate_smc_uvd_level()
1326 table->UvdLevel[count].MinVoltage.Vddc = in tonga_populate_smc_uvd_level()
1329 table->UvdLevel[count].MinVoltage.VddGfx = in tonga_populate_smc_uvd_level()
1333 table->UvdLevel[count].MinVoltage.Vddci = in tonga_populate_smc_uvd_level()
1336 table->UvdLevel[count].MinVoltage.Phases = 1; in tonga_populate_smc_uvd_level()
1341 table->UvdLevel[count].VclkFrequency, in tonga_populate_smc_uvd_level()
1351 table->UvdLevel[count].DclkFrequency, &dividers); in tonga_populate_smc_uvd_level()
1356 table->UvdLevel[count].DclkDivider = in tonga_populate_smc_uvd_level()
1359 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency); in tonga_populate_smc_uvd_level()
[all …]
H A Dci_smumgr.c1529 table->UvdLevel[count].VclkFrequency = in ci_populate_smc_uvd_level()
1531 table->UvdLevel[count].DclkFrequency = in ci_populate_smc_uvd_level()
1533 table->UvdLevel[count].MinVddc = in ci_populate_smc_uvd_level()
1535 table->UvdLevel[count].MinVddcPhases = 1; in ci_populate_smc_uvd_level()
1538 table->UvdLevel[count].VclkFrequency, &dividers); in ci_populate_smc_uvd_level()
1542 table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider; in ci_populate_smc_uvd_level()
1545 table->UvdLevel[count].DclkFrequency, &dividers); in ci_populate_smc_uvd_level()
1549 table->UvdLevel[count].DclkDivider = (uint8_t)dividers.pll_post_divider; in ci_populate_smc_uvd_level()
1550 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency); in ci_populate_smc_uvd_level()
1551 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].DclkFrequency); in ci_populate_smc_uvd_level()
[all …]
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dvegam_smumgr.c1325 table->UvdLevel[count].MinVoltage = 0; in vegam_populate_smc_uvd_level()
1326 table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk; in vegam_populate_smc_uvd_level()
1327 table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk; in vegam_populate_smc_uvd_level()
1328 table->UvdLevel[count].MinVoltage |= in vegam_populate_smc_uvd_level()
1340 table->UvdLevel[count].MinVoltage |= 1 << PHASES_SHIFT; in vegam_populate_smc_uvd_level()
1344 table->UvdLevel[count].VclkFrequency, &dividers); in vegam_populate_smc_uvd_level()
1348 table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider; in vegam_populate_smc_uvd_level()
1351 table->UvdLevel[count].DclkFrequency, &dividers); in vegam_populate_smc_uvd_level()
1357 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency); in vegam_populate_smc_uvd_level()
1358 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].DclkFrequency); in vegam_populate_smc_uvd_level()
[all …]
H A Dfiji_smumgr.c1568 table->UvdLevel[count].MinVoltage = 0; in fiji_populate_smc_uvd_level()
1569 table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk; in fiji_populate_smc_uvd_level()
1570 table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk; in fiji_populate_smc_uvd_level()
1571 table->UvdLevel[count].MinVoltage |= (mm_table->entries[count].vddc * in fiji_populate_smc_uvd_level()
1573 table->UvdLevel[count].MinVoltage |= ((mm_table->entries[count].vddc - in fiji_populate_smc_uvd_level()
1575 table->UvdLevel[count].MinVoltage |= 1 << PHASES_SHIFT; in fiji_populate_smc_uvd_level()
1579 table->UvdLevel[count].VclkFrequency, &dividers); in fiji_populate_smc_uvd_level()
1586 table->UvdLevel[count].DclkFrequency, &dividers); in fiji_populate_smc_uvd_level()
1592 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency); in fiji_populate_smc_uvd_level()
1593 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].DclkFrequency); in fiji_populate_smc_uvd_level()
[all …]
H A Dpolaris10_smumgr.c1537 table->UvdLevel[count].MinVoltage = 0; in polaris10_populate_smc_uvd_level()
1538 table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk; in polaris10_populate_smc_uvd_level()
1539 table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk; in polaris10_populate_smc_uvd_level()
1540 table->UvdLevel[count].MinVoltage |= (mm_table->entries[count].vddc * in polaris10_populate_smc_uvd_level()
1552 table->UvdLevel[count].MinVoltage |= 1 << PHASES_SHIFT; in polaris10_populate_smc_uvd_level()
1556 table->UvdLevel[count].VclkFrequency, &dividers); in polaris10_populate_smc_uvd_level()
1560 table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider; in polaris10_populate_smc_uvd_level()
1563 table->UvdLevel[count].DclkFrequency, &dividers); in polaris10_populate_smc_uvd_level()
1569 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency); in polaris10_populate_smc_uvd_level()
1570 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].DclkFrequency); in polaris10_populate_smc_uvd_level()
[all …]
H A Dtonga_smumgr.c1324 table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk; in tonga_populate_smc_uvd_level()
1325 table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk; in tonga_populate_smc_uvd_level()
1326 table->UvdLevel[count].MinVoltage.Vddc = in tonga_populate_smc_uvd_level()
1329 table->UvdLevel[count].MinVoltage.VddGfx = in tonga_populate_smc_uvd_level()
1333 table->UvdLevel[count].MinVoltage.Vddci = in tonga_populate_smc_uvd_level()
1336 table->UvdLevel[count].MinVoltage.Phases = 1; in tonga_populate_smc_uvd_level()
1341 table->UvdLevel[count].VclkFrequency, in tonga_populate_smc_uvd_level()
1351 table->UvdLevel[count].DclkFrequency, &dividers); in tonga_populate_smc_uvd_level()
1356 table->UvdLevel[count].DclkDivider = in tonga_populate_smc_uvd_level()
1359 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency); in tonga_populate_smc_uvd_level()
[all …]
H A Dci_smumgr.c1529 table->UvdLevel[count].VclkFrequency = in ci_populate_smc_uvd_level()
1531 table->UvdLevel[count].DclkFrequency = in ci_populate_smc_uvd_level()
1533 table->UvdLevel[count].MinVddc = in ci_populate_smc_uvd_level()
1535 table->UvdLevel[count].MinVddcPhases = 1; in ci_populate_smc_uvd_level()
1538 table->UvdLevel[count].VclkFrequency, &dividers); in ci_populate_smc_uvd_level()
1542 table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider; in ci_populate_smc_uvd_level()
1545 table->UvdLevel[count].DclkFrequency, &dividers); in ci_populate_smc_uvd_level()
1549 table->UvdLevel[count].DclkDivider = (uint8_t)dividers.pll_post_divider; in ci_populate_smc_uvd_level()
1550 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency); in ci_populate_smc_uvd_level()
1551 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].DclkFrequency); in ci_populate_smc_uvd_level()
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/pm/inc/
H A Dsmu7_fusion.h235 SMU7_Fusion_UvdLevel UvdLevel [SMU7_MAX_LEVELS_UVD]; member
/dports/misc/rump/buildrump.sh-b914579/src/sys/external/bsd/drm2/dist/drm/radeon/
H A Dsmu7_fusion.h235 SMU7_Fusion_UvdLevel UvdLevel [SMU7_MAX_LEVELS_UVD]; member
H A Dci_dpm.c2204 table->UvdLevel[count].VclkFrequency = in ci_populate_smc_uvd_level()
2206 table->UvdLevel[count].DclkFrequency = in ci_populate_smc_uvd_level()
2208 table->UvdLevel[count].MinVddc = in ci_populate_smc_uvd_level()
2210 table->UvdLevel[count].MinVddcPhases = 1; in ci_populate_smc_uvd_level()
2214 table->UvdLevel[count].VclkFrequency, false, &dividers); in ci_populate_smc_uvd_level()
2218 table->UvdLevel[count].VclkDivider = (u8)dividers.post_divider; in ci_populate_smc_uvd_level()
2222 table->UvdLevel[count].DclkFrequency, false, &dividers); in ci_populate_smc_uvd_level()
2226 table->UvdLevel[count].DclkDivider = (u8)dividers.post_divider; in ci_populate_smc_uvd_level()
2228 table->UvdLevel[count].VclkFrequency = cpu_to_be32(table->UvdLevel[count].VclkFrequency); in ci_populate_smc_uvd_level()
2229 table->UvdLevel[count].DclkFrequency = cpu_to_be32(table->UvdLevel[count].DclkFrequency); in ci_populate_smc_uvd_level()
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/radeon/
H A Dsmu7_fusion.h235 SMU7_Fusion_UvdLevel UvdLevel [SMU7_MAX_LEVELS_UVD]; member
H A Dci_dpm.c2623 table->UvdLevel[count].VclkFrequency = in ci_populate_smc_uvd_level()
2625 table->UvdLevel[count].DclkFrequency = in ci_populate_smc_uvd_level()
2627 table->UvdLevel[count].MinVddc = in ci_populate_smc_uvd_level()
2629 table->UvdLevel[count].MinVddcPhases = 1; in ci_populate_smc_uvd_level()
2633 table->UvdLevel[count].VclkFrequency, false, &dividers); in ci_populate_smc_uvd_level()
2637 table->UvdLevel[count].VclkDivider = (u8)dividers.post_divider; in ci_populate_smc_uvd_level()
2641 table->UvdLevel[count].DclkFrequency, false, &dividers); in ci_populate_smc_uvd_level()
2645 table->UvdLevel[count].DclkDivider = (u8)dividers.post_divider; in ci_populate_smc_uvd_level()
2647 table->UvdLevel[count].VclkFrequency = cpu_to_be32(table->UvdLevel[count].VclkFrequency); in ci_populate_smc_uvd_level()
2648 table->UvdLevel[count].DclkFrequency = cpu_to_be32(table->UvdLevel[count].DclkFrequency); in ci_populate_smc_uvd_level()
[all …]
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/pm/inc/
H A Dsmu7_fusion.h235 SMU7_Fusion_UvdLevel UvdLevel [SMU7_MAX_LEVELS_UVD]; member
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/radeon/
H A Dsmu7_fusion.h235 SMU7_Fusion_UvdLevel UvdLevel [SMU7_MAX_LEVELS_UVD]; member
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/radeon/
H A Dsmu7_fusion.h235 SMU7_Fusion_UvdLevel UvdLevel [SMU7_MAX_LEVELS_UVD]; member
H A Dci_dpm.c2623 table->UvdLevel[count].VclkFrequency = in ci_populate_smc_uvd_level()
2625 table->UvdLevel[count].DclkFrequency = in ci_populate_smc_uvd_level()
2627 table->UvdLevel[count].MinVddc = in ci_populate_smc_uvd_level()
2629 table->UvdLevel[count].MinVddcPhases = 1; in ci_populate_smc_uvd_level()
2633 table->UvdLevel[count].VclkFrequency, false, &dividers); in ci_populate_smc_uvd_level()
2637 table->UvdLevel[count].VclkDivider = (u8)dividers.post_divider; in ci_populate_smc_uvd_level()
2641 table->UvdLevel[count].DclkFrequency, false, &dividers); in ci_populate_smc_uvd_level()
2645 table->UvdLevel[count].DclkDivider = (u8)dividers.post_divider; in ci_populate_smc_uvd_level()
2647 table->UvdLevel[count].VclkFrequency = cpu_to_be32(table->UvdLevel[count].VclkFrequency); in ci_populate_smc_uvd_level()
2648 table->UvdLevel[count].DclkFrequency = cpu_to_be32(table->UvdLevel[count].DclkFrequency); in ci_populate_smc_uvd_level()
[all …]
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/pm/inc/
H A Dsmu7_fusion.h235 SMU7_Fusion_UvdLevel UvdLevel [SMU7_MAX_LEVELS_UVD]; member

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