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Searched refs:VHDL_BINOP_EQ (Results 1 – 6 of 6) sorted by relevance

/dports/cad/iverilog/verilog-11.0/tgt-vhdl/
H A Dstmt.cc1217 new vhdl_binop_expr(VHDL_BINOP_EQ, vhdl_type::boolean()); in check_against_x()
1226 cmp = new vhdl_binop_expr(VHDL_BINOP_EQ, vhdl_type::boolean()); in check_against_x()
1269 new vhdl_binop_expr(VHDL_BINOP_EQ, vhdl_type::boolean()); in process_number()
1279 cmp = new vhdl_binop_expr(VHDL_BINOP_EQ, vhdl_type::boolean()); in process_number()
1289 cmp = new vhdl_binop_expr(VHDL_BINOP_EQ, vhdl_type::boolean()); in process_number()
1347 cmp = new vhdl_binop_expr(VHDL_BINOP_EQ, vhdl_type::boolean()); in process_signal()
1371 cmp = new vhdl_binop_expr(VHDL_BINOP_EQ, vhdl_type::boolean()); in process_signal()
1378 cmp = new vhdl_binop_expr(VHDL_BINOP_EQ, vhdl_type::boolean()); in process_signal()
1388 cmp = new vhdl_binop_expr(VHDL_BINOP_EQ, vhdl_type::boolean()); in process_signal()
1398 cmp = new vhdl_binop_expr(VHDL_BINOP_EQ, vhdl_type::boolean()); in process_signal()
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H A Dlogic.cc76 cmp = new vhdl_binop_expr(sel, VHDL_BINOP_EQ, on, NULL); in bufif_logic()
80 vhdl_binop_t op = if0 ? VHDL_BINOP_EQ : VHDL_BINOP_NEQ; in bufif_logic()
H A Dexpr.cc377 result = translate_relation(lhs, rhs, VHDL_BINOP_EQ); in translate_binary()
382 rhs->cast(&std_logic_vector), VHDL_BINOP_EQ); in translate_binary()
384 result = translate_relation(lhs, rhs, VHDL_BINOP_EQ); in translate_binary()
H A Dlpm.cc256 return rel_lpm_to_expr(scope, lpm, VHDL_BINOP_EQ); in lpm_to_expr()
308 new vhdl_binop_expr(sel, VHDL_BINOP_EQ, b1, vhdl_type::boolean()); in draw_mux_lpm()
H A Dcast.cc149 (this, VHDL_BINOP_EQ, one, vhdl_type::boolean()); in to_boolean()
H A Dvhdl_syntax.hh92 VHDL_BINOP_EQ, enumerator