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Searched refs:VHDL_BINOP_OR (Results 1 – 4 of 4) sorted by relevance

/dports/cad/iverilog/verilog-11.0/tgt-vhdl/
H A Dstmt.cc956 new vhdl_binop_expr(VHDL_BINOP_OR, vhdl_type::boolean()); in draw_wait()
1208 new vhdl_binop_expr(VHDL_BINOP_OR, vhdl_type::boolean()); in check_against_x()
1260 new vhdl_binop_expr(VHDL_BINOP_OR, vhdl_type::boolean()); in process_number()
1361 new vhdl_binop_expr(VHDL_BINOP_OR, vhdl_type::boolean()); in process_signal()
H A Dexpr.cc412 result = translate_numeric(lhs, rhs, VHDL_BINOP_OR); in translate_binary()
415 result = translate_logical(lhs, rhs, VHDL_BINOP_OR); in translate_binary()
H A Dlogic.cc239 return inputs_to_expr(scope, VHDL_BINOP_OR, log); in translate_logic_inputs()
H A Dvhdl_syntax.hh91 VHDL_BINOP_OR, enumerator