Searched refs:VHDL_BINOP_SR (Results 1 – 3 of 3) sorted by relevance
| /dports/cad/iverilog/verilog-11.0/tgt-vhdl/ |
| H A D | expr.cc | 433 result = translate_shift(lhs, rhs, VHDL_BINOP_SR); in translate_binary()
442 result = translate_shift(lhs, rhs, VHDL_BINOP_SR); in translate_binary()
500 return new vhdl_binop_expr(from, VHDL_BINOP_SR, base->to_integer(), in translate_select()
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| H A D | lpm.cc | 282 return shift_lpm_to_expr(scope, lpm, VHDL_BINOP_SR); in lpm_to_expr()
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| H A D | vhdl_syntax.hh | 102 VHDL_BINOP_SR, enumerator
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