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Searched refs:VHDL_UNARYOP_NEG (Results 1 – 3 of 3) sorted by relevance

/dports/cad/iverilog/verilog-11.0/tgt-vhdl/
H A Dexpr.cc186 (VHDL_UNARYOP_NEG, operand, new vhdl_type(*operand->get_type())); in translate_unary()
H A Dvhdl_syntax.hh140 VHDL_UNARYOP_NEG enumerator
H A Dvhdl_syntax.cc916 case VHDL_UNARYOP_NEG: in emit()