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Searched refs:VHDL_WAIT_FOR (Results 1 – 3 of 3) sorted by relevance

/dports/cad/iverilog/verilog-11.0/tgt-vhdl/
H A Dvhdl_syntax.hh423 VHDL_WAIT_FOR, // Wait for a constant amount of time enumerator
H A Dvhdl_syntax.cc395 case VHDL_WAIT_FOR: in emit()
H A Dstmt.cc653 new vhdl_wait_stmt(VHDL_WAIT_FOR, time); in draw_delay()