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Searched refs:VHDL_WAIT_FOR0 (Results 1 – 3 of 3) sorted by relevance

/dports/cad/iverilog/verilog-11.0/tgt-vhdl/
H A Dvhdl_syntax.hh424 VHDL_WAIT_FOR0, // Special wait for zero time enumerator
H A Dvhdl_syntax.cc400 case VHDL_WAIT_FOR0: in emit()
H A Dstmt.cc393 vhdl_seq_stmt *wait = new vhdl_wait_stmt(VHDL_WAIT_FOR0); in emit_wait_for_0()