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Searched refs:VHDL_WAIT_UNTIL (Results 1 – 3 of 3) sorted by relevance

/dports/cad/iverilog/verilog-11.0/tgt-vhdl/
H A Dvhdl_syntax.hh425 VHDL_WAIT_UNTIL, // Wait on an expression enumerator
H A Dvhdl_syntax.cc403 case VHDL_WAIT_UNTIL: in emit()
H A Dstmt.cc1006 container->add_stmt(new vhdl_wait_stmt(VHDL_WAIT_UNTIL, test)); in draw_wait()