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/dports/devel/arm-elf-binutils/binutils-2.37/gas/testsuite/gas/arm/
H A Darchv8m_1m-cmse-main.s11 vscclrm {VPR} @ Accepts list with only VPR
12 vscclrm {s30, VPR} @ Accept single-precision VFP register and VPR together
13 vscclrm {d14, VPR} @ Likewise for double-precision VFP register
14 vscclrm {s1-s4, VPR} @ Accept range of single-precision VFP registers
15 @ and VPR together
16 vscclrm {d1-d4, VPR} @ Likewise for double-precision VFP registers
17 vscclrm {s0-s31, VPR} @ Accept all single-precision VFP registers and VPR
19 vscclrm {d0-d15, VPR} @ Likewise for double-precision VFP registers
20 vscclrmne {s3, VPR} @ Accepts conditional execution
33 vldr VPR, [r3] @ Accepts VPR system register
[all …]
H A Darchv8m_1m-cmse-main.d14 0+.* <[^>]*> ec9f 0b00 vscclrm {VPR}
15 0+.* <[^>]*> ec9f fa01 vscclrm {s30, VPR}
16 0+.* <[^>]*> ec9f eb02 vscclrm {d14, VPR}
17 0+.* <[^>]*> ecdf 0a04 vscclrm {s1-s4, VPR}
18 0+.* <[^>]*> ec9f 1b08 vscclrm {d1-d4, VPR}
19 0+.* <[^>]*> ec9f 0a20 vscclrm {s0-s31, VPR}
20 0+.* <[^>]*> ec9f 0b20 vscclrm {d0-d15, VPR}
22 0+.* <[^>]*> ecdf 1a01 vscclrmne {s3, VPR}
34 0+.* <[^>]*> edd3 8f80 vldr VPR, \[r3\]
51 0+.* <[^>]*> edc3 8f80 vstr VPR, \[r3\]
H A Darchv8m_1m-cmse-main-bad.s11 vscclrm {s0} @ Rejects list without VPR
12 vscclrm {s1, d1, VPR} @ Reject mix of single and double-precision VFP registers
13 vscclrm {s1-d1, VPR} @ Likewise when using a range
H A Darchv8m_1m-cmse-main-bad.l6 [^:]*:11: Error: VPR expected last -- `vscclrm {s0}'
8 [^:]*:13: Error: VFP single precision register expected -- `vscclrm {s1-d1,VPR}'
/dports/devel/gnulibiberty/binutils-2.37/gas/testsuite/gas/arm/
H A Darchv8m_1m-cmse-main.s11 vscclrm {VPR} @ Accepts list with only VPR
12 vscclrm {s30, VPR} @ Accept single-precision VFP register and VPR together
13 vscclrm {d14, VPR} @ Likewise for double-precision VFP register
14 vscclrm {s1-s4, VPR} @ Accept range of single-precision VFP registers
15 @ and VPR together
16 vscclrm {d1-d4, VPR} @ Likewise for double-precision VFP registers
17 vscclrm {s0-s31, VPR} @ Accept all single-precision VFP registers and VPR
19 vscclrm {d0-d15, VPR} @ Likewise for double-precision VFP registers
20 vscclrmne {s3, VPR} @ Accepts conditional execution
33 vldr VPR, [r3] @ Accepts VPR system register
[all …]
H A Darchv8m_1m-cmse-main.d14 0+.* <[^>]*> ec9f 0b00 vscclrm {VPR}
15 0+.* <[^>]*> ec9f fa01 vscclrm {s30, VPR}
16 0+.* <[^>]*> ec9f eb02 vscclrm {d14, VPR}
17 0+.* <[^>]*> ecdf 0a04 vscclrm {s1-s4, VPR}
18 0+.* <[^>]*> ec9f 1b08 vscclrm {d1-d4, VPR}
19 0+.* <[^>]*> ec9f 0a20 vscclrm {s0-s31, VPR}
20 0+.* <[^>]*> ec9f 0b20 vscclrm {d0-d15, VPR}
22 0+.* <[^>]*> ecdf 1a01 vscclrmne {s3, VPR}
34 0+.* <[^>]*> edd3 8f80 vldr VPR, \[r3\]
51 0+.* <[^>]*> edc3 8f80 vstr VPR, \[r3\]
H A Darchv8m_1m-cmse-main-bad.s11 vscclrm {s0} @ Rejects list without VPR
12 vscclrm {s1, d1, VPR} @ Reject mix of single and double-precision VFP registers
13 vscclrm {s1-d1, VPR} @ Likewise when using a range
H A Darchv8m_1m-cmse-main-bad.l6 [^:]*:11: Error: VPR expected last -- `vscclrm {s0}'
8 [^:]*:13: Error: VFP single precision register expected -- `vscclrm {s1-d1,VPR}'
/dports/devel/binutils/binutils-2.37/gas/testsuite/gas/arm/
H A Darchv8m_1m-cmse-main.s11 vscclrm {VPR} @ Accepts list with only VPR
12 vscclrm {s30, VPR} @ Accept single-precision VFP register and VPR together
13 vscclrm {d14, VPR} @ Likewise for double-precision VFP register
14 vscclrm {s1-s4, VPR} @ Accept range of single-precision VFP registers
15 @ and VPR together
16 vscclrm {d1-d4, VPR} @ Likewise for double-precision VFP registers
17 vscclrm {s0-s31, VPR} @ Accept all single-precision VFP registers and VPR
19 vscclrm {d0-d15, VPR} @ Likewise for double-precision VFP registers
20 vscclrmne {s3, VPR} @ Accepts conditional execution
33 vldr VPR, [r3] @ Accepts VPR system register
[all …]
H A Darchv8m_1m-cmse-main.d14 0+.* <[^>]*> ec9f 0b00 vscclrm {VPR}
15 0+.* <[^>]*> ec9f fa01 vscclrm {s30, VPR}
16 0+.* <[^>]*> ec9f eb02 vscclrm {d14, VPR}
17 0+.* <[^>]*> ecdf 0a04 vscclrm {s1-s4, VPR}
18 0+.* <[^>]*> ec9f 1b08 vscclrm {d1-d4, VPR}
19 0+.* <[^>]*> ec9f 0a20 vscclrm {s0-s31, VPR}
20 0+.* <[^>]*> ec9f 0b20 vscclrm {d0-d15, VPR}
22 0+.* <[^>]*> ecdf 1a01 vscclrmne {s3, VPR}
34 0+.* <[^>]*> edd3 8f80 vldr VPR, \[r3\]
51 0+.* <[^>]*> edc3 8f80 vstr VPR, \[r3\]
H A Darchv8m_1m-cmse-main-bad.s11 vscclrm {s0} @ Rejects list without VPR
12 vscclrm {s1, d1, VPR} @ Reject mix of single and double-precision VFP registers
13 vscclrm {s1-d1, VPR} @ Likewise when using a range
H A Darchv8m_1m-cmse-main-bad.l6 [^:]*:11: Error: VPR expected last -- `vscclrm {s0}'
8 [^:]*:13: Error: VFP single precision register expected -- `vscclrm {s1-d1,VPR}'
/dports/dns/void-zones-tools/void-zones-tools-1.0.2/
H A Dstore.c49 deallocate(VPR(value->p), false); in releaseValue()
53 deallocate(VPR(value->s), false); in releaseValue()
241 deallocate(VPR(o), false); in addTreeNode()
298 deallocate_batch(false, VPR((*node)->name), in removeTreeNode()
299 VPR(*node), NULL); in removeTreeNode()
340 deallocate_batch(false, VPR((*node)->name), in removeTreeNode()
341 VPR(*node), NULL); in removeTreeNode()
372 deallocate_batch(false, VPR(node->name), in releaseTree()
373 VPR(node), NULL); in releaseTree()
448 deallocate(VPR(table), false); in releaseTable()
[all …]
/dports/sysutils/ipdbtools/ipdb-1.1.2/
H A Dstore.c276 deallocate(VPR(*node), false); in removeIP4Node()
316 deallocate(VPR(*node), false); in removeIP4Node()
361 deallocate(VPR(node), false); in releaseIP4Tree()
604 deallocate(VPR(*node), false); in removeIP6Node()
644 deallocate(VPR(*node), false); in removeIP6Node()
689 deallocate(VPR(node), false); in releaseIP6Tree()
911 deallocate(VPR(*node), false); in removeCCNode()
951 deallocate(VPR(*node), false); in removeCCNode()
980 deallocate(VPR(node), false); in releaseCCTree()
1000 deallocate(VPR(table), false); in releaseCCTable()
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/ARM/
H A DMVEVPTBlockPass.cpp75 if (CmpMI->modifiesRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
77 if (CmpMI->readsRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
129 if (Iter->definesRegister(ARM::VPR) || Iter->killsRegister(ARM::VPR)) in IsVPRDefinedOrKilledByBlock()
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/ARM/
H A DMVEVPTBlockPass.cpp75 if (CmpMI->modifiesRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
77 if (CmpMI->readsRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
129 if (Iter->definesRegister(ARM::VPR) || Iter->killsRegister(ARM::VPR)) in IsVPRDefinedOrKilledByBlock()
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/ARM/
H A DMVEVPTBlockPass.cpp75 if (CmpMI->modifiesRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
77 if (CmpMI->readsRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
135 if (Iter->definesRegister(ARM::VPR) || Iter->killsRegister(ARM::VPR)) in IsVPRDefinedOrKilledByBlock()
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/ARM/
H A DMVEVPTBlockPass.cpp75 if (CmpMI->modifiesRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
77 if (CmpMI->readsRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
135 if (Iter->definesRegister(ARM::VPR) || Iter->killsRegister(ARM::VPR)) in IsVPRDefinedOrKilledByBlock()
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/
H A DMVEVPTBlockPass.cpp75 if (CmpMI->modifiesRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
77 if (CmpMI->readsRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
135 if (Iter->definesRegister(ARM::VPR) || Iter->killsRegister(ARM::VPR)) in IsVPRDefinedOrKilledByBlock()
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/ARM/
H A DMVEVPTBlockPass.cpp75 if (CmpMI->modifiesRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
77 if (CmpMI->readsRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
129 if (Iter->definesRegister(ARM::VPR) || Iter->killsRegister(ARM::VPR)) in IsVPRDefinedOrKilledByBlock()
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/ARM/
H A DMVEVPTBlockPass.cpp75 if (CmpMI->modifiesRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
77 if (CmpMI->readsRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
135 if (Iter->definesRegister(ARM::VPR) || Iter->killsRegister(ARM::VPR)) in IsVPRDefinedOrKilledByBlock()
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/ARM/
H A DMVEVPTBlockPass.cpp75 if (CmpMI->modifiesRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
77 if (CmpMI->readsRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
135 if (Iter->definesRegister(ARM::VPR) || Iter->killsRegister(ARM::VPR)) in IsVPRDefinedOrKilledByBlock()
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/
H A DMVEVPTBlockPass.cpp75 if (CmpMI->modifiesRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
77 if (CmpMI->readsRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
135 if (Iter->definesRegister(ARM::VPR) || Iter->killsRegister(ARM::VPR)) in IsVPRDefinedOrKilledByBlock()
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/
H A DMVEVPTBlockPass.cpp75 if (CmpMI->modifiesRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
77 if (CmpMI->readsRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
135 if (Iter->definesRegister(ARM::VPR) || Iter->killsRegister(ARM::VPR)) in IsVPRDefinedOrKilledByBlock()
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/
H A DMVEVPTBlockPass.cpp75 if (CmpMI->modifiesRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
77 if (CmpMI->readsRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
135 if (Iter->definesRegister(ARM::VPR) || Iter->killsRegister(ARM::VPR)) in IsVPRDefinedOrKilledByBlock()

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